⚡ 本页包含 AI 生成的分析内容，仅供参考
本文提出了一款采用16nm FinFET工艺的168Mb嵌入式STT-MRAM芯片，位单元面积仅0.0249μm²，通过模块化架构、双端口访问和交错读取架构，实现了51.2Gb/s的读取吞吐量，克服了非易失性存储器的密度和性能挑战，适用于汽车应用。
Chao-Jung Hung1, Tan-Li Chou1, Chih-Hui Weng2, Chia-Yu Wang2, J.J. Wu2, Harry Chuang2, Yih Wang1, Yu-Der Chih1, Tsung-Yung Jonathan Chang1 TSMC Design Technology, Hsinchu, Taiwan, 2TSMC, Hsinchu, Taiwan 1 Abstract A 16nm 168Mb embedded STT-MRAM with a 0.0249µm2 bit cell that overcomes density and performance challenges of competing NVM technologies is presented. The design features a modular architecture supporting customizable macros, a dual-port access scheme, and an interleaving read architecture achieving a 51.2Gb/s throughput. Fabricated in a 16nm FinFET process, the chip demonstrates a 20-year data retention at 150°C, 1M-cycle write endurance, and is suitable for automotive and edge AI applications. Spin-transfer torque magnetoresistive random access memory (STT-MRAM) has emerged as a leading candidate for next-generation memory technologies, offering a compelling combination of non-volatility, excellent high-temperature data retention, high endurance,
Po-Hao Lee1, Chia-Fu Lee1, Hon-Jarn Lin1, Cheng-Han Lu1, Yen-An Chang1, Pranata W. Sanjaya1, Chia-Jung Tsen1, Kuan-Chun Chen1, Ming-Chieh Lin1,