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ISSCC 2026Session 27 · FREQUENCY GENERATORS, MULTIPLIERS AND MODULATORSClocking & PLLs

A Dual-Mode DCO-PA with a Twisted 8-Shape Inductor for BLE Achieving 42% TX Efficiency at 1.6dBm and 0.29mW RX Clock

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📋 论文概要

本文提出了一种用于BLE的0.3V双模(2.4/4.8GHz)DCO-PA,采用扭曲8字形电感实现八度调谐,TX模式下效率达42%,RX时钟功耗仅0.29mW。通过类D类操作将晶体管效率提升至75%,并利用尾晶体管降低RX模式功耗和1/f相位噪声拐点至约40kHz。

💡 主要创新点

核心指标
TX效率42% @ 1.6dBm,RX时钟功耗0.29mW
重要性
发表年份
ISSCC 2026

🏷 关键词

BLEDCO-PA扭曲8字形电感超低功耗双模

📄 原文摘要

Abstract This paper presents a 0.3V dual-mode (2.4/4.8GHz) DCO-PA for BLE, achieving 42% efficiency in the TX mode and 0.29mW power consumption in the RX clock mode. It features: 1) a twisted 8-shape inductor enabling octave tuning, with Class-D-like operation boosting transistor efficiency to 75%; 2) a tail transistor in the RX mode that minimizes power consumption and lowers the 1/f phase-noise corner to ~40kHz. With the rapid growth of IoT, demand for ultra-low-power (ULP) wireless devices has surged. Among short-range standards, Bluetooth low energy (BLE) dominates ULP transceiver (TRX) design. In conventional architectures (Fig. 27.9.1, top left), multiple blocks (oscillator, driver, PA) consume significant power, limiting efficiency even at 0dBm output [1-7]. To improve efficiency, function-reuse oscillating power amplifiers (Osc-PAs) merge oscillation and power amplification into a single block. While effective in standalone

👥 作者与机构

Jiawen Chen1,2, Kai Xu2, Luyi Guo1, Teerachot Siriburanon1, Jun Yin3, Bashir M. Al-Hashimi2, Robert Bogdan Staszewski1

University College Dublin, Dublin, Ireland, 2King’s College London, London, United Kingdom, 3University of Macau, Macau, China

分类:Clocking & PLLs · 年份:ISSCC 2026