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ISSCC 2026Session 30 · COMPUTE-IN-MEMORYAI / ML22nm CMOS

A 22nm 96Mb 50.6-to-90.2TFLOPS/W Non-Linear MLC ReRAM CIM Macro with High-Retention for Mamba/Transformer/CNN

⚡ 本页包含 AI 生成的分析内容,仅供参考

📋 论文概要

本文提出了一种基于DTCO设计的22nm 96Mb高保持多模式ReRAM非易失性计算-存内宏,支持线性MLC、非线性MLC和SLC模式,适用于Mamba、Transformer和CNN等不同神经网络工作负载,解决了推理精度、能效和读取鲁棒性等关键挑战。该宏实现了50.6至90.2 TFLOPS/W的能效。

💡 主要创新点

工艺节点
22nm CMOS
重要性
发表年份
ISSCC 2026

🏷 关键词

ReRAM计算存内宏多级单元非易失性计算高能效AI推理

📄 原文摘要

Jen-Chun Tien1, De-Qi You1, Ping-Sheng Wu2, Bo Zhang3, Ren-Shuo Liu1, Chih-Cheng Hsieh1, Kea-Tiong Tang1, Meng-Fan Chang1,2 National Tsing Hua University, Hsinchu, Taiwan, 2TSMC Corporate Research, Hsinchu, Taiwan, 3TSMC Corporate Research, San Jose, CA *Equally Credited Authors (ECAs) 1 Abstract We present a DTCO-designed high-retention multi-mode ReRAM nvCIM macro supporting linear MLC (L-MLC), non-linear MLC (NL-MLC), and SLC modes for Mamba, Transformer, and CNN workloads, addressing key challenges in inference accuracy, energy, and readout robustness. The proposed macro incorporates: 1) a reconfigurable compute mode for accuracy/efficiency tradeoff, 2) ISE-HF encoding to enhance input sparsity and save energy, 3) an S2R-Db ADC that enables high-yield, low-power NL-MLC readout. The design achieves 50.6-to-90.2TFLOPS/W (BF16) with ImageNet accuracy loss that is 79.17% lower than LMLC after 10 years of retention.

👥 作者与机构

Hung-Hsi Hsu*1, Win-San Khwa*2, Yao-Kai Yeh1, Chih-Ling Wu1, Chang-Yuan Chen1, Yen-Che Huang1, Yen-Hua Lin1, Cheng-Feng Chang1, Yen-Tung Shao1,

分类:AI / ML · 年份:ISSCC 2026