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本文提出了一种二次指数噪声耦合的增量型Sigma-Delta调制器(IDSM)，实现了高于4阶的噪声整形效果，同时具有对DAC非线性高容忍度和低噪声代价。通过复用DAC2和加法器，提高了有效过采样率和能效，在28nm CMOS工艺下实现了83.8dB SNDR和103.9dB SFDR。
Abstract This paper presents a quadratic-exponential noise-coupled (NC) IDSM to achieve a quantization noise shaping effect greater than 4th order with OSR 22, while having high tolerance to DAC non-linearity and a small noise penalty factor. The DAC2 and adder in NC are reused for a larger effective OSR and improve energy efficiency. Implemented in 28nm CMOS, the IDSM achieves an SNDR/SFDR of 83.8dB/103.9dB, with a 3MHz bandwidth, and 794μW, resulting in Schreier FoMSNDR/FoMDR of 179.6dB/181.4dB. Incremental ADCs are increasingly attracting interest for their Nyquist-like single-shot conversion, easy multiplexing, and simple decimation filter, making them ideal for highresolution IoT devices, sensor interfaces, and instrumentation [1-4]. To boost resolution and bandwidth with high efficiency, high-order loop filters and multi-bit quantizers are frequently utilized in IDSMs.(However, the non-uniform weighting of high-order IDSMs
Zhensheng Li1,2, Biao Wang3, Mingqiang Guo1, Rui P. Martins1, Sai-Weng Sin1
University of Macau, Macau, China, 2UM Hetao IC Research Institute, Shenzhen, China, 3Formula Microelectronics, Shanghai, China