A 0.092pJ/b and 7.7fJ/b/dB Cross-Self-Referenced Slope-Sampling Receiver with Long-Tail ISI Robustness for Next-Generation Low-Power Memory Interfaces

📋 论文概要

本文提出了一种交叉自参考斜率采样接收机，通过基于输入信号斜率判定数据，增强了对长尾码间干扰的鲁棒性，无需均衡器。该接收机在65nm CMOS工艺下实现，在12.5Gb/s速率下能效为0.092pJ/b，FoM为7.7fJ/b/dB，面积仅0.001mm²，适用于下一代低功耗存储器接口。

💡 主要创新点

• 提出交叉自参考斜率采样架构，利用信号斜率而非幅度进行数据判决，显著提升对长尾后光标间干扰的容忍度。
• 无需任何均衡器即可实现高鲁棒性，降低了接收机复杂度和功耗。
• 在极低面积（0.001mm²）下实现高能效（0.092pJ/b）和优异FoM（7.7fJ/b/dB）。

🏷 关键词

📄 原文摘要

*Equally Credited Authors (ECAs) Abstract We present a cross-self-referenced slope-sampling RX that is robust against long-tail ISI, without equalization, for next-generation low-power memory interfaces. By determining received data based on the slope of the input signal, the proposed architecture enhances resilience to accumulated post-cursor ISI. Fabricated in a 65-nm CMOS process, the prototype achieves a 0.092pJ/b energy efficiency at 12.5Gb/s and a 7.7fJ/b/dB FoM at 12Gb/s, while occupying only 0.001mm2. As power-hungry data-centric applications are widely employed, the need for energyefficient high-bandwidth communication between processing units and off-chip memory is increasing. Consequently, low-power double-data-rate (LPDDR) dynamic random-access memory (DRAM) is being adopted in data centers and edge devices due to its energy efficiency. As data rates continue to rise, across LPDDR generations, channel loss becomes

👥 作者与机构

Ki-Soo Lee*, Chanheum Han*, Joo-Hyung Chae

Kwangwoon University, Seoul, Korea