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ISSCC 2026Session 8 · DIE-TO-DIE AND HIGH-SPEED ELECTRICAL TRANSCEIVERSWireline I/O

A 0.292pJ/b 56Gb/s/wire Capacitively Driven Simultaneous Bidirectional Transceiver with PVT/Mismatch Tracking for XSR and D2D Interfaces in 28nm CMOS

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📋 论文概要

提出一种0.292pJ/b 56Gb/s/wire的单端电容驱动同时双向收发器,利用电容驱动降低功耗和自干扰,并采用AC/DC复制和PVT/失配跟踪实现PVT鲁棒性,无需额外硬件。该收发器在宽电压、温度及信道损耗范围内保持BER<1e-12,适用于极短距离(XSR)和芯片间(D2D)互连。

💡 主要创新点

核心指标
0.292pJ/b, 56Gb/s/wire, BER<1e-12
重要性
发表年份
ISSCC 2026

🏷 关键词

电容驱动同时双向低功耗收发器PVT跟踪芯片间互连

📄 原文摘要

Abstract A low-power (0.292pJ/b), high-bandwidth (56Gb/s/wire) single-ended capacitively driven simultaneous bi-directional (CD-SBD) TRX with PVT tolerance is proposed. Capacitive driving reduces power and self-interference in SBD. AC/DC replica and PVT/mismatch tracking provides PVT robustness without extra hardware. Per-lane CDR and a quadrature generator with QEC/DCC, secure clock margin. The TRX sustains <1e-12 BER across -6.5 to -11.5dB loss, 0.93-1.2V supply, and 0-80°C temperature variation. Low power consumption and high bandwidth are two major priorities in XSR and die-todie (D2D) interfaces. Figure 8.8.1(top) shows 3 signaling candidates to achieve 2× bandwidth at the same channel density as in XSR. Capacitively driven PAM-4 (CD-PAM-4) is power-efficient and provides inherent equalization (EQ) as it uses capacitive driving [13]. However, the eye height (EH) is only 1/3 of CD-NRZ [4], leading to a degraded SNR.

👥 作者与机构

Kahyun Kim, Yoona Lee, Daehoon Na, Ha-Jung Park, Jeongeun Song, Woo-Seok Choi

Seoul National University, Seoul, Korea

分类:Wireline I/O · 年份:ISSCC 2026