ISSCC 2015
Session 20
Power Management
A 50nW-to-10mW Output Power Tri-Mode Digital Buck Converter with Self-Tracking Zero Current Detection for Photovoltaic Energy Harvesting
Photovoltaic energy harvesting is an attractive method of developing battery-free systems for wireless sensors, biomedical electronics, and the internet of things (IoT). To obtain an energy-efficient system, low-power di
ISSCC 2013
Session 3
Digital Processors
A 3.40ms/GF(p521) and 2.77ms/GF(2521) DF-ECC Processor with Side-Channel Attack Resistance
Public-key cryptosystems (Fig. 3.3.1) have been widely developed for ensuring the security of information exchange in network communications, financial markets, private data storage, and personal identification devices.
ISSCC 2012
Session 27
Data Converters
A 5.37mW 10b 200MS/s Dual-Path Pipelined ADC
The opamps in a switched-capacitor (SC) pipelined ADC provide the functions of sample-and-hold, residue generation, and residue amplification [1,2]. High-performance opamps that meet the requirements for dc gain, speed,
ISSCC 2011
Session 10
Data Converters
A 12b 1.25GS/s DAC in 90nm CMOS with >70dB SFDR up to 500MHz
The current-steering DACs are commonly used in generating high-frequency signals [1-4]. A current-steering DAC comprises current cells of various sizes. Each of them contains a current source and a current switch. The DA
ISSCC 2009
Session 5
Wireline I/O
A 7.1mW 10GHz All-Digital Frequency Synthesizer with Dynamically Reconfigurable Digital Loop Filter in 90nm CMOS
ADPLL frequency synthesizers have recently drawnsignificant research attention as the technology paradigm shifts into the nanometer CMOS arena [1-5]. They circumvent several design issues that conventional charge-pump-ba
ISSCC 2008
Session 6
RF & Wireless
A 3-to-10GHz 14-Band CMOS Frequency Synthesizer with Spurs Reduction for MB-OFDM UWB System
As proposed by MB-OFDM alliance, the spectrum for UWB communication system ranges from 3.1-to-10.6GHz, which is divided into 14 bands, each of 528MHz bandwidth, and categorized into 5 groups [1]. To meet the stringent fr
ISSCC 2008
Session 11
Wireline I/O
A 10Gb/s Laser-Diode Driver with Active BackTermination in 0.18µm CMOS
A laser-diode driver (LDD) requires output transmission-line back-termination that absorbs signal reflection from the imperfectly terminated load, especially when a low-cost laser diode is used to build a high-speed opti