ISSCC 2026
Session 2
AI / ML
Tiamat: A 98-to-134ms/Step Transformer-Based Diffusion Model Processor Supporting Classifier-Free Guidance for Image Generation
Abstract A 16nm FinFET transformer-based diffusion model processor chip is fabricated for supporting class-conditional DiT-XL/2 and text-to-image PixArt-α with 98ms and 134ms generation time per step with 7.37TOPS and 14
ISSCC 2025
Session 7
Wireline I/O
A 2.06pJ/b 106.25Gb/s PAM-4 Receiver with 3-Tap FFE and 1-Tap Speculative DFE in 28nm CMOS
The increasing demand for I/O bandwidth in data center pushes the data rate of serial links up to 100Gb/s. Although ADC-based receivers have powerful and flexible DSP equalization that can compensate for >20dB channel lo
ISSCC 2024
Session 7
Wireline I/O
A 2.16pJ/b 112Gb/s PAM-4 Transceiver with Time-Interleaved 2b/3b ADCs and Unbalanced Baud-Rate CDR for XSR Applications in 28nm CMOS
serializer-deserializer (SerDes) transceivers for >100Gb/s data rates have been developed in recent years [1-4]. Differing from the medium-reach (MR) or long-reach (LR) applications, the XSR TRX targets <50mm traces for
ISSCC 2023
Session 2
AI / ML
VISTA: A 704mW 4K-UHD CNN Processor for Video and Image Spatial/Temporal Interpolation Acceleration
Video convolutional neural networks (CNNs) have achieved great success in highresolution imaging applications, such as video super-resolution (VSR) and demonstrated superior quality and temporal consistency by leveraging
ISSCC 2022
Session 33
Digital Processors
A HD 31fps 7×7-View Light-Field Factorization Processor for Dual-Layer 3D Factored Display
provides a fullparallax glasses-free 3D viewing experience. Compared to other autostereoscopic techniques, factored displays provide greater depth of field, larger field of view, and smoother perspective switching withou
ISSCC 2018
Session 14
Data Converters
A 0.4V 13b 270kS/s SAR-ISDM ADC with an Opamp-Less Time-Domain Integrator
With advanced DAC switching [1-3] and low-power comparator [4] techniques, the successive-approximation register (SAR) ADC demonstrates convincing performance with technology development for internet-of-everything (IoE)
ISSCC 2013
Session 15
Data Converters
A 2.4-to-5.2fJ/conversion-step 10b 0.5-to-4MS/s SAR ADC with Charge-Average Switching DAC in 90nm CMOS
Applications of wireless sensor networks and biomedical devices frequently require an ADC with medium resolution (8 to 12b) running at hundreds of kS/s to a few MS/s. Successive-approximation register (SAR) ADCs show con
ISSCC 2013
Session 13
Wireless
A Scalable Direct-Sampling Broadband Radar Receiver Supporting Simultaneous Digital Multibeam Array in 65nm CMOS
Intelligent environments significantly impact human daily lives through embedded sensing and actuating systems. Wireless sensors that can provide non-contact radio information are indispensable. Impulse radar is position
ISSCC 2012
Session 6
Image Sensors
A 0.5V 4.95µW 11.8fps PWM CMOS Imager with 82dB Dynamic Range and 0.055% Fixed-Pattern Noise
Lately, developing a low-voltage, power-efficient image sensor for disposable or implantable biomedical devices has become an important topic [1,2]. Instead of using a conventional CMOS active pixel sensor (APS), convert