机构

IMEC

8 篇 ISSCC 论文

ISSCC 2009 Session 29 mm-Wave
A 57-to-66GHz Quadrature PLL in 45nm Digital CMOS
K. Scheir1,2, G. Vandersteen2, Y. Rolain2, P. Wambacq1,2, 1
for high-data-rate communication. Despite the large amount of research on CMOS mm-wave frequency generation, current state-of-the-art mm-wave PLLs [1-5] do not achieve a tuning range that is wide enough to cover the worl
ISSCC 2009 Session 29 mm-Wave
A Digitally Controlled Compact 57-to-66GHz Front-End in 45nm Digital CMOS
Jonathan Borremans1, Kuba Raczkowski1,2, Piet Wambacq1,3, 1
high-datarate communication [1-4]. From a cost perspective, a highly integrated solution is favorable. Speed and power consumption considerations for the highdata-rate digital part of the chip make 45nm CMOS a very reali
ISSCC 2009 Session 17 Sensors
Integrated Capacitive Power-Management Circuit for Thermal Harvesters with Output Power 10 to 1000µW
I. Doms1,2, P. Merken1,3, R. Mertens1,2, C. Van Hoof1,2, 1
U.Leuven, Leuven, Belgium 3 R.M.A., Brussels, Belgium 2 Energy harvesters [1] power energy-autonomous wireless sensor systems by converting ambient environmental energy into electrical energy. Thermoelectric generators (
ISSCC 2008 Session 9 mm-Wave
A 52GHz Phased-Array Receiver Front-End in 90nm Digital CMOS
K. Scheir1,2, S. Bronckers1,2, J. Borremans1,2, P. Wambacq1,2, Y. Rolain2, 1
components at high frequencies impose the application of beamforming to enable wireless communication in the mm-wave band. At the receiver side, beamforming improves the SNR and increases immunity against interfering sig
ISSCC 2008 Session 29 Other
A 400µW 4.7-to-6.4GHz VCO under an Above-IC Inductor in 45nm CMOS
J. Borremans1,2, P. Wambacq1,2, M. Kuijk2, G. Carchon1, S. Decoutere1, 1
performance attainable in already available technologies. Above-IC technology (A-IC), consisting of a 5μm thick electroplated Cu layer on an 18μm low-K BCB dielectric, post-processed on top of the CMOS, provides a low-co
ISSCC 2008 Session 17 Other
A Single-Inductor Dual-Band VCO in a 0.06mm2 5.6GHz Multi-Band Front-End in 90nm Digital CMOS
J. Borremans1,2, S. Bronckers1,2, P. Wambacq1,2, M. Kuijk2, J. Craninckx1, 1
applications. Expensive scaled CMOS processes are readily used as a technology enabler to provide adequate performance. The high implementation cost of circuits in such processes is justified by the added functionality o
ISSCC 2008 Session 15 Power Management
Capacitive Power-Management Circuit for Micropower Thermoelectric Generators with a 2.1µW Controller
Inge Doms1,2, Patrick Merken1,3, Robert P. Mertens1,2, Chris Van Hoof1,2, 1
U.Leuven, Heverlee, Belgium R. M. A., Brussels, Belgium 3 Energy scavenging [1] is an emerging method to power energyautonomous wireless sensor systems by converting ambient environmental energy into electrical energy. M
ISSCC 2008 Session 12 Data Converters
A 150MS/s 133µW 7b ADC in 90nm digital CMOS Using a Comparator-Based Asynchronous BinarySearch sub-ADC
Geert Van der Plas1, Bob Verbruggen1,2, 1
in medium- to high-speed (10s of MS/s to a few GS/s) and medium- to low-resolution (4b to 9b) A/D converters. Current state-of-the-art FOM is 65fJ [1]. These efficiency improvements are primarily driven by mobile, wirele