ISSCC 2025
Session 4
Analog Circuits
A 12.8GS/s Sub-Sampling ADC Front-End with 38GHz Input Bandwidth and >39dB SNDR for 1 to 32GHz in 22nm FDSOI
with the crowded wireless spectrum results in a trend towards millimeter-wave frequencies. RF-sampling architectures offer advantages in terms of flexibility, simplicity and robustness. However, presenting the ADC direct
ISSCC 2024
Session 5
Wireless
A Stacking Mixer-First Receiver Achieving >20dBm Adjacent-Channel IIP3 Consuming less than 25mW
The sub-6GHz spectrum is used by many standards including 5G New Radio. In this crowded spectrum, an RX requires good linearity and flexibility to address different bands without separate SAW filters, whilst maintaining lo
ISSCC 2020
Session 30
Wireless
A 370µW 5.5dB-NF BLE/BT5.0/IEEE 802.15.4-Compliant Receiver with >63dB Adjacent Channel Rejection at >2 Channels Offset in 22nm FDSOI
Analog Devices, Cork, Ireland 1 2 Upcoming Internet-of-Things (IoT) applications require low-power multi-standard RF receiver (RX) front-ends. Interference rejection becomes increasingly important as ever more devices co
ISSCC 2017
Session 24
Wireless
A High-Linearity CMOS Receiver Achieving +44dBm IIP3 and +13dBm B1dB for SAW-Less LTE Radio
high-linearity up-front filtering to prevent corruption of the in-band signals by strong out-of-band (OOB) signals and selfinterference from the transmitter. SAW duplexer filters are generally used for this purpose, but
ISSCC 2016
Session 26
Wireless
An Ultra-Low-Power Receiver Using TransmittedReference and Shifted Limiters for In-Band Interference Resilience
The coexistence of more and more wireless standards in the ISM bands increases the design difficulty of interference-robust receivers (RX), especially for Wireless Sensor Nodes because of their Ultra-Low-Power (ULP) budge
ISSCC 2015
Session 19
Wireless
A Self-Interference-Cancelling Receiver for In-Band Full-Duplex Wireless with Low Distortion Under Cancellation of Strong TX Leakage
In-band full-duplex (FD) wireless communication, i.e. simultaneous transmission and reception at the same frequency, in the same channel, promises up to 2x spectral efficiency, along with advantages in higher network lay
ISSCC 2015
Session 15
Data Converters
A 115dB-DR Audio DAC with –61dBFS Out-of-Band Noise
Delectronics, Enschede, The Netherlands, 3 Teledyne DALSA Semiconductors, Enschede, The Netherlands 1 2 Out-of-band noise (OBN) is troublesome in analog circuits that process the output of a noise-shaping audio DAC. It c
ISSCC 2014
Session 17
Analog Circuits
An Integrated 80V 45W Class-D Power Amplifier with Optimal-Efficiency-Tracking Switching Frequency Regulation
Piezoelectric actuators are widely used in smart materials for vibration and noise control, precision actuators, etc. [1]. These actuators are largely capacitive and the reactive power applied on them can go to several t
ISSCC 2013
Session 5
RF & Wireless
Simultaneous Spatial and Frequency-Domain Filtering at the Antenna Inputs Achieving up to +10dBm Out-of-Band/Beam P1dB
Multi-antenna transceivers with beam-forming are recently gaining interest for low GHz frequencies (<6GHz) [1-4]. In the antenna beam, (phase-shifted) signals from multiple antennas add constructively, improving SNR, whi
ISSCC 2013
Session 10
Analog Circuits
A 0.1-to-1.2GHz Tunable 6th-Order N-Path ChannelSelect Filter with 0.6dB Passband Ripple and +7dBm Blocker Tolerance
Radio receivers should be robust to large out-of-band blockers with small degradation in their sensitivity. N-path mixers can be used as mixer-first receivers [1] with good linearity and RF filtering [2]. However, 1/f no
ISSCC 2012
Session 9
Wireless
A 1.5-to-5.0GHz Input-Matched +2dBm P1dB AllPassive Switched-Capacitor Beamforming Receiver Front-End in 65nm CMOS
TNO Science and Industry, The Hague, The Netherlands 1 2 Phased arrays in CMOS for consumer communication bands aim to enhance receiver performance by exploiting beamforming with antenna arrays. Sensitivity increases wit
ISSCC 2012
Session 4
RF & Wireless
A 1-to-2.5GHz Phased-Array IC Based on gm-RC All-Pass Time-Delay Cells
shifters. Although a constant phase shift can approximate a time delay in a limited frequency band, this does not hold for larger arrays that scan over wide angles and have a large instantaneous bandwidth. In this case t
ISSCC 2012
Session 4
RF & Wireless
A Wideband IM3 Cancellation Technique for CMOS Attenuators
are used to limit the incident power to the level that the receiver circuitry can handle without degrading the linearity; in the transmitter path stringent power control is also desirable. Although variable-gain amplifie
ISSCC 2012
Session 4
RF & Wireless
8-Path Tunable RF Notch Filters for Blocker Suppression
The huge growth of the number of wireless devices makes wireless coexistence an increasingly relevant issue. If radios operate in close proximity, blockers as strong as 0dBm may occur, driving almost any receiver in comp
ISSCC 2012
Session 21
Analog Circuits
A 0.0025mm2 Bandgap Voltage Reference for 1.1V Supply in Standard 0.16µm CMOS Tmin= -100°C and results in VREF ≅ 900mV. In our design we did some extra optimization in the length ratios and width ratios of the transistors to get maximum curvature correction. The designed circuit occupies 50×50µm2 in a standard 0.16µm bulk CMOS technology. Measurements are done on a Süss Microtec PM200 wafer prober with cooling, using a Keithley 4200 analyzer.
Anagear, Rosmalen, The Netherlands 1 2 Todays ICs usually employ one bandgap voltage reference (BGVR) circuit to generate a well defined voltage that is reused at many places in that IC. The classical BGVR generates a re
ISSCC 2012
Session 21
Analog Circuits
A 0.3-to-1.2GHz Tunable 4th-Order Switched gm-C Bandpass Filter with >55dB Ultimate Rejection and Out-of-Band IIP3 of +29dBm
The trend towards reconfigurable receivers requires on-chip flexible filters that can replace dedicated, bulky and non-tunable filters (e.g., SAW and BAW [1]). Although BAW filters are compatible with silicon processes,
ISSCC 2009
Session 19
Analog Circuits
A sub-1V Bandgap Voltage Reference in 32nm FinFET Technology
likely the successor would be the FinFET. The FinFET is an ultra-thin body multi-gate MOS transistor with among other characteristics a much higher voltage gain compared to a conventional bulk MOS transistor [1]. Bandgap
ISSCC 2009
Session 12
RF & Wireless
A 400-to-900 MHz Receiver with Dual-domain Harmonic Rejection Exploiting Adaptive Interference Cancellation
Wideband direct-conversion harmonic-rejection (HR) receivers for softwaredefined radio aim to remove or relax the pre-mixer RF filters, which are inflexible, bulky and costly [1,2]. HR schemes derived from [3] are often
ISSCC 2009
Session 12
RF & Wireless
A Software-Defined Radio Receiver Architecture Robust to Out-of-Band Interference
In a software-defined radio (SDR) receiver it is desirable to minimize RF bandfiltering for flexibility, size and cost reasons, but this leads to increased outof-band interference (OBI). Besides harmonic and intermodulat
ISSCC 2009
Session 12
RF & Wireless
A 0.2-to-2.0GHz 65nm CMOS Receiver Without LNA Achieving >11dBm IIP3 and <6.5 dB NF
Spurious-free dynamic range (SFDR) is a key specification of radio receivers and spectrum analyzers, characterizing the maximum distance between signal and noise+distortion. SFDR is limited by the linearity (intercept po
ISSCC 2008
Session 29
Other
Digital Detection of Oxide Breakdown and Life-Time Extension in Submicron CMOS Technology
In modern CMOS technologies reliability issues limit the maximum operating voltage of transistors. This prevents the integration of efficient power amplifiers (e.g., audio or RF) since stacked devices are needed to preve
ISSCC 2008
Session 17
Other
A Discrete-Time Mixing Receiver Architecture with Wideband Harmonic Rejection
Recently several CMOS software-defined radio (SDR) demonstrators have been presented using mixers as the wideband downconverter [1,2]. Meanwhile, the feasibility of RF samplers as downconverter has also been demonstrated