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Texas Instruments

14 篇 ISSCC 论文

ISSCC 2023 Session 3 Other
Bandpass Filter and Oscillator ICs with THD < -140dBc at 10Vppd for Testing High-Resolution ADCs
Subha Sarkar1,2, Rajat Agarwal1, Nagendra Krishnapura2
Indian Institute of Technology Madras, Chennai, India 1 2 The growing demand for high-resolution (18 to 20bit) precision ADCs has increased the need for very low THD (< -140dBc) testing hardware that can simultaneously c
ISSCC 2020 Session 18 Power Management
A 120mA Non-Isolated Capacitor-Drop AC/DC Power Supply
Yogesh Ramadass*1, Andres Blanco*2, Boqiang Xiao*3, John Cummings3, *Equally-Credited Authors (ECAs)
meters, appliances, smoke alarms to ground fault detectors require a non-isolated DC supply that is powered directly from the AC mains. These applications typically require the ability to handle up to 305VAC,rms at the i
ISSCC 2017 Session 5 Analog Circuits
Frequency-Locked-Loop Ring Oscillator with 3ns Peak-to-Peak Accumulated Jitter in 1ms Time Window for High-Resolution Frequency Counting
Karthik Pappu, George Pieter Reitsma, Sumant Bapat
Many sensing applications require a high-resolution frequency measurement. These applications include measurement of pressure, acceleration and eddycurrent sensing. In these applications the sensor is part of an oscillat
ISSCC 2017 Session 1 Plenary
Dynamics of Exponentials in Circuits and Systems
Ahmad Bahai, Chief Technology Officer,
1.1 Introduction Scaling of CMOS, the technology that has driven our industry for 45 years and prompted unprecedented innovations in device, circuit, and manufacturing, is coming to an end. There is no unanimous agreemen
ISSCC 2016 Session 5 Analog Circuits
A 24MHz Crystal Oscillator with Robust Fast Start-Up Using Dithered Injection
Danielle Griffith1, James Murdock1, Per Torstein Røine2
Wireless nodes in Internet-of-Everything (IoE) applications achieve low power consumption by operating the radio at very low duty cycles. The wireless node spends most of its time in sleep, waking only occasionally to tr
ISSCC 2016 Session 5 Analog Circuits
A 10MHz-Bandwidth 4µs-Large-Signal-Settling 6.5nV/√Hz-Noise 2µV-Offset Chopper Operational Amplifier
Vadim Ivanov, Munaf Shaik
Low-offset and low-noise operational amplifiers (OpAmps) are essential for precision measurement systems. Applications such as precision weigh scales, sensor front-ends, bridge transducers, interfaces for thermocouple se
ISSCC 2015 Session 5 Analog Circuits
A 37µW Dual-Mode Crystal Oscillator for Single-Crystal Radios
Danielle Griffith1, James Murdock1, Per Torstein Røine2, Thomas Murphy1
reductions in power, cost and size of wireless sensors. Wireless nodes reduce average power by using intermittent data transmission, which is synchronized by a continuously operating sleep timer in each node. In some app
ISSCC 2014 Session 17 Analog Circuits
A 190nW 33kHz RC Oscillator with ±0.21% Temperature Stability and 4ppm Long-Term Stability
Danielle Griffith1, Per Torstein Røine2, James Murdock1, Ryan Smith1
In wireless networks with a low duty cycle, the radio is operational for only a small percentage of the time. A sleep timer is used to synchronize the data transmission and reception. The total system power is then limit
ISSCC 2011 Session 27 Data Converters
A 108dB-DR 120dB-THD and 0.5Vrms Output Audio DAC with Inter-Symbol-Interference-Shaping Algorithm in 45nm CMOS
Lars Risbo1, Rahmi Hezar2, Burak Kelleci2, Halil Kiper2, Mounir Fares2, 1
fine-resolution quantization to reduce the out-of-band noise (OBN), reduce jitter sensitivity, and simplify analog filtering. Recent techniques achieve this goal by using a mix of DAC elements with different weights, e.g
ISSCC 2011 Session 13 Analog Circuits
A 36V JFET-Input Bipolar Operational Amplifier with 1µV/°C Maximum Offset Drift and –126dB Total Harmonic Distortion
Martijn F. Snoeij, Mikhail V. Ivanov
A 36V JFET-input bipolar operational amplifier is presented with a maximum offset drift of 1µV/°C over a temperature range of –40 to 125°C, which represents a 3x improvement on the state-of-the-art. This is achieved with
ISSCC 2010 Session 4 Analog Circuits
45nm CMOS 8Ω Class-D Audio Driver with 79% Efficiency and 100dB SNR
Sreekiran Samala, Vineet Mishra, Kalyan Chekuri Chakravarthi
Integrating audio and power management into a system-on-chip (SoC) is of interest due to reduced board area and cost. Integrated Class-D audio drivers need to drive high voltages to deliver high power across small loads;
ISSCC 2010 Session 16 Data Converters
A 16b 100-to-160MS/s SiGe BiCMOS Pipelined ADC with 100dBFS SFDR
Robert Payne, Marco Corsi, David Smith, Scott Kaylor, Daniel Hsieh
The RX signal path in wireless base transceiver stations (BTS) drives the continued development of high-resolution high-speed ADCs. Such ADCs enable BTSs with software-defined and/or multi-carrier capability, such as mul
ISSCC 2009 Session 26 Other
A 20W/channel Class-D Amplifier with Significantly Reduced Common-Mode Radiated Emissions
Patrick P. Siniscalchi, Richard K. Hester
Due to their rail-to-rail switching nature, Class-D audio amplifiers are prone to generating electromagnetic interference (EMI) that is in excess of what is acceptable in many systems. Such systems typically require devi
ISSCC 2008 Session 12 Data Converters
Highly Interleaved 5b 250MS/s ADC with Redundant Channels in 65nm CMOS
Brian P. Ginsburg1, Anantha P. Chandrakasan2, 1
to the highest combination of resolution and speed in pipelined ADCs [1,2] and has made the sampling rate of SAR ADCs competitive with flash ADCs [3,4], but several challenges exist. As every sample must be accurate, per