Columbia University

Abstract We present a novel RF canceller that utilizes (i) a novel N-path-filter-based architecture that uses filter stacking to achieve passive tap combining leading to a lower NF degradation, (ii) a sub-cycle rotation

Abstract We present TinyPAD, a 166µm2/lane probing-attack detector in 16nm FinFET with 82pF maximum supported loading as well as 0.2pF minimum detectable capacitance (MDC) that operates robustly over -40 to125°C and from

Intel, Hillsboro, OR 1 2 A probing attack on PCB signal traces poses a substantial threat, as it provides an avenue for eavesdropping on transmitted data between chips. This technique can even be exploited for a complete

In mobile and edge devices, always-on keyword spotting (KWS) is an essential function to detect wake-up words. Recent works achieved extremely low power dissipation down to ~500nW [1]. However, most of them adopt noise-d

The four main passive circuit elements include the resistor, capacitor, inductor, and transformer. Inductors and transformers have been notoriously challenging to integrate in silicon, and they occupy a significant chip

*Equally-Credited Authors (ECAs) The ever-increasing Internet data demand imposes stringent requirements on wireline transceiver speed, jitter, and power. A low-noise, multi-phase clock generator (MPCG) is a crucial buil

circuits are used for a variety of functions, including the realization of oscillators and loss compensation. Active negative-resistance circuits, such as cross-coupled gm cells, can provide power gain but, when used for

There has been significant recent progress in the implementation of integrated non-reciprocal components based on linear periodically-time-varying (LPTV) circuits [1-5]. Nevertheless, integrated circulators still require

There has been significant recent research on non-magnetic non-reciprocal components at RF and mm-waves, such as circulators and isolators, based on spatio-temporal modulation [1-3]. Circulators enable simultaneous transm

PicoNodes have applications in warehouse inventory, smart homes, or integrated patient monitoring and require ultra-low power consumption to eliminate battery replacement or enable batteryless systems. A small form facto

In the recent past, there have been exciting advances in dividerless PLLs, such as sub-sampling PLLs (SSPLLs) [1,2] and injection-locked clock multipliers (ILCMs) [3] that substantially reduce loop noise to cross the -25

Digital receiver (RX) arrays featuring ADCs at each element enable massive multiin-multi-out (MIMO) applications, but since spatial interference rejection is absent in the RF/analog domain, RF/analog/ADC dynamic range is

SK hynix, Icheon, Korea 1 2 In today’s system-on-chip designs, a low-drop-out voltage regulator (LDO) is one of the most popular choices to create a distinct voltage domain owing to its high power density. Many LDOs, how

High-performance phase-locked loops (PLLs) and clock multipliers with low jitter/phase noise are essential for numerous applications, such as digital microprocessors and SoCs, wireline/optical links, data converters and

implementation of low-cost, small-form-factor, integrated shared-antenna (ANT) interfaces with low loss, low noise, high TX-RX isolation, and large TX power handling. Providing more TX-RX isolation in the ANT interface t

A significant challenge for silicon-based mm-wave systems is a low-loss sharedantenna (ANT) interface with high linearity, isolation (ISO) and bandwidth (BW). Shared ANT interfaces with simultaneous transmit and receive

Digital power amplifiers and transmitters have drawn significant interest in the recent past due to their reconfigurability, compatibility with CMOS technology scaling and DSP, and potential for automated design synthesi

Full-duplex (FD) is an emergent wireless communication paradigm where the transmitter (TX) and the receiver (RX) operate at the same time and at the same frequency. The fundamental challenge with FD is the tremendous amo

To meet the demands of ever-increasing data throughput, carrier aggregation (CA) across frequency bands is becoming necessary. Different regional spectrum allocations lead to a large number of band combinations and chall

Oregon State University, Corvallis, OR 1 2 Multiple-antenna receivers offer numerous advantages over single-antenna receivers, including sensitivity improvement, ability to reject interferers spatially and enhancement of

Modern SoC designs employ a number of power domains, many of which are often implemented by low-drop-out (LDO) regulators. The key overhead of the existing LDO design is the large off-chip output capacitor (Cout) for com

SRAM register files have sensitive circuitry and often operate with high switching activity and at high temperature. This makes them particularly vulnerable to aging by negative-bias temperature instability (NBTI) degrad

The demand for lower cost and form factor and increased re-configurability in wireless systems has driven the investigation of blocker-tolerant softwaredefined radios [1-4]. While promising, a reduction in system form-fa

Novel highly networked applications with severe energy constraints such as tag and body-area networks, for ubiquitous object networking [1] or the ‘Internet of Things’ are driving the need for ultra-low-power wireless da

is a future environment that is adaptive and responsive to the objects and human beings that occupy it. Wideband RF and mm-Wave radar and imaging sensors will play a key role for indoor and outdoor surveillance, search a

investigating the function of the nervous system. Optical techniques, based on voltage- and calcium-sensitive dyes or photouncaging, along with multi-photon fluorescent microscopy have proven very successful in imaging a

The fixed sampling and clock rates in conventional DSPs result in power dissipation determined by the highest frequency to be processed. If sampling and clock are eliminated, one has a DSP operating in continuous-time [1

area of intense investigation, motivated by low supply headroom and poor analog performance in ultra-scaled CMOS. RF frequency synthesis is particularly amenable to a digital architecture and has already seen integration