机构

KAIST

51 篇 ISSCC 论文

ISSCC 2026 Session 36 AI / ML
A 43.8-to-662.0μW 27.5-to-878.9fps Frame-Rate-Scalable Duty-Cycled Electrical Impedance Tomography System with MIMO Current-Balancing IA
Haidam Choi*1, Gichan Yun*1, Ji-Hoon Suh2, Seonwoo Park1, Donghyeon Yi1, Sohmyung Ha3, Minkyu Je1
*Equally Credited Authors (ECAs) 1 Abstract This paper presents a frame-rate-scalable duty-cycled electrical impedance tomography system to reduce average power consumption. A proposed multiple-input multiple-output curr
ISSCC 2026 Session 31 AI / ML
Tri-Oracle: A 17.78μJ/Token Vision-Language Model Accelerator with Token-Attention-Weight Redundancy Prediction
Seungjae Yoo, Hangyeol Kim, Muyoung Son, Yi Chen, Suheon Jeong, Joo-Young Kim
Abstract This paper presents Tri-Oracle, a VLM accelerator exploiting token, attention, and weight redundancies. A Token Merging Unit (TMU) merges 68% of redundant tokens. An Attention Head Prediction Unit (AHPU) predict
ISSCC 2026 Session 31 AI / ML
SoulMate: A 9.8mW Mobile Intelligence System-on-Chip with Mixed-Rank Architecture for On-Device LLM Personalization
Seongyon Hong, Jiwon Choi, Jeonggyu So, Nayeong Lee, Wooyoung Jo, Zhamaliddin Kalzhan, Woojin Chin, Hoi-Jun Yoo
Abstract This work presents SoulMate, a fully on-device mobile intelligence system-on-chip, integrating retrieval-augmented generation (RAG) and fine tuning of a personal LLM. SoulMate is fabricated in 28nm CMOS with a n
ISSCC 2026 Session 31 Other
Revolver: Low-Bit GenAI Accelerator for Distilled-Model and CoT with Phase-Aware-Quantization and Rotation-Based Integer-Scaled Group Quantization
Sangjin Kim, Jungjun Oh, Byeongcheol Kim, Yuseon Choi, Gwangtae Park, Hoi-Jun Yoo
Abstract Revolver is a low-bit GenAI accelerator that enables reasoning and multi-turn chat on edge devices under tight memory and power budgets. It introduces Phase-Aware Precision Selection (PAPS) with Multi-Precision
ISSCC 2026 Session 25 Hardware Security
OmniCrypt: A 435.86M-GOPS/W Bootstrappable Multi-Scheme FHE Accelerator with On-Chip Data Generation for Privacy-Preserving Computation
Adiwena Putra*, Hyunjun Cho*, Sungwoong Yune, Cuong Manh Duong, Jaeho Jeon, Joo-Young Kim
*Equally Credited Authors (ECAs) Abstract OmniCrypt is a silicon-proven multi-scheme FHE accelerator that supports both bootstrapping and scheme switching. Fabricated in 28nm CMOS (12.96mm2), it integrates three speciali
ISSCC 2026 Session 24 Sensors
A 10b Display Driver IC with a Pivoting Translinear-Loop DAC-in-Buffer Enabling 1μs 1-H Scan Time and 1722μm2 per Channel
Hyeong-Joon Kim, Yousung Park, Kihyun Kim, Seunghwa Shin, Hyun-Sik Kim
Abstract This paper presents a 10b display driver IC (DDI) for high-resolution OLEDs. It features a novel pivoting translinear-loop (PTL) DAC-in-buffer that overcomes the area, speed, and linearity trade-offs. A key enab
ISSCC 2026 Session 24 Sensors
A 512ch 10b Source-Driver IC with Current-Mode Auto-Zeroing Scheme Achieving 1.4mV DVO and 600ns 1-Horizontal Time for Mobile OLED Displays
Yousung Park, Gyu-Wan Lim, Hyun-Sik Kim
Abstract This paper presents a 10b source-driver IC (SD-IC) for ultra-fast, uniform-luminance mobile OLED displays. A current-mode auto-zeroing (CM-AZ) scheme transparently cancels outputbuffer offset—lowering DVO with z
ISSCC 2026 Session 24 Sensors
A 4042-PPI 10b 240Hz Digital-PWM CMOS Backplane for Micro-LED-on-Silicon Displays with a Shared, Unified Memory-in-Pixel Architecture
Kihyun Kim, Jun-Gi Lee, Hyun-Sik Kim
Abstract This paper presents a 10b 240Hz digital-PWM CMOS backplane for μLED-on-Silicon with a shared, unified memory-in-pixel structure. A unified D-FF chain (UDC) merges the in-pixel register, counter, and comparator i
ISSCC 2026 Session 18 Other
SMoLPU: 122.1μJ/Token Sparse MoE-Based Speculative Decoding Language Processing Unit with Adaptive-Offload NPU-CIM Core
Sangwoo Ha1, Jingu Lee1, Youngjin Moon1, Sunjoo Whang1, Wooyoung Jo1, Gwangtae Park1, Sangjin Kim1, Soyeon Um2, Junha Ry
decoding LLM processor with an NPU-CIM core. It has 3 features: 1) Token-adaptive expert refinement removes redundant expert activations and schedules expert load order, achieving 2.3×/4.2× energy efficiency improvement
ISSCC 2025 Session 37 Digital Circuits
A 13.5µW 35-Keyword End-to-End Keyword Spotting System Featuring Personalized On-Chip Training in 28nm CMOS
Hyuk-Jin Lee1, Kyunghoon Pyo1, Taekwang Jang2, Mingoo Seok3, SeongHwan Cho1
customized to individual users. However, keyword spotting (KWS), a feature that is gaining widespread adoption in many personal devices, remains largely non-user-configurable as it is designed for the general public. Whi
ISSCC 2025 Session 35 Medical & Bio
An Enhanced-Frequency-Splitting-Based Wireless Power and Data Transfer System Achieving 60.2% End-to-End Efficiency and 1Mb/s Data Rate with a Sub-cm RX Coil for Miniaturized Implants
Yechan Park1, Phan Dang Hung2, Donghyun Youn1, Daehyeon Kwon1, Chul Kim1, Minkyu Je1
invasiveness and complexity of the device-deployment process. In such miniaturization, the main bottleneck is wireless power and data transfer (WPDT), particularly the volume of the receiver (RX) coil. Conventionally, on
ISSCC 2025 Session 35 Medical & Bio
A Wireless Adiabatic Stimulator System with Current-Mode Power Reception and Stimulus Current Regulation Achieving Precise Charge Delivery and Electrode Scalability for Miniaturized Electroceuticals
Yechan Park, Chul Kim, Minkyu Je
Electroceuticals that directly stimulate nerves are attracting attention as their effectiveness on various intractable diseases has been verified [1]. In such wireless implantable neurostimulators, miniaturizing the rece
ISSCC 2025 Session 23 Other
Slim-Llama: A 4.69mW Large-Language-Model Processor with Binary/Ternary Weights for Billion-Parameter Llama Model
Sangyeob Kim, Jungwan Lee, Hoi-Jun Yoo
Recently, multiple ASICs [1-6] have been proposed to accelerate large language models (LLMs). However, the enormous number of LLM parameters leads to significant energy consumption due to external memory access (EMA). Wh
ISSCC 2025 Session 19 Clocking & PLLs
A 60GHz I/Q-Calibrated SSB-Mixer-Based LO with Sub-ns Settling Time and -56dBc Worst-Case Spur Using ILO Filter in 28nm CMOS
Jaewon Oh1, Cheol So2, Hyojun Kim3, Songcheol Hong1, SeongHwan Cho1
University of California, Santa Babara, CA 3 Korea Aerospace Research Institute, Daejeon, Korea 1 2 Joint communication and radar sensing (JCAS) has been gaining much attention for its efficient use of spectrum, particul
ISSCC 2022 Session 30 Power Management
A 130V Triboelectric Energy-Harvesting Interface in 0.18µm BCD with Scalable Multi-Chip-Stacked Bias-Flip and Daisy-Chained Synchronous Signaling Technique
Jiho Lee, Sang-Han Lee, Gyeong-Gu Kang, Jae-Hyun Kim, Gyu-Hyeong Cho, Hyun-Sik Kim
vibration energy have gained popularity as a next-generation energy source owing to their numerous advantages including flexibility, high conversion efficiency, and low cost. However, ultrahigh instantaneous open-circuit
ISSCC 2022 Session 23 Clocking & PLLs
A 188fsrms-Jitter and –243dB-FoMjitter 5.2GHz-Ring-DCO-Based Fractional-N Digital PLL with a 1/8 DTC-Range-Reduction Technique Using a Quadruple-Timing-Margin Phase Selector
Chanwoong Hwang*, Hangi Park*, Taeho Seong, Jaehyouk Choi
*Equally Credited Authors (ECAs) Modern SoCs for advanced wireless/wired applications integrate an increasing number of PLLs. 5G TRXs require multiple PLLs to implement complex schemes of carrier aggregation and MIMO. Mu
ISSCC 2022 Session 15 AI / ML
ARCHON: A 332.7TOPS/W 5b Variation-Tolerant Analog CNN Processor Featuring Analog Neuronal Computation Unit and Analog Memory
Jin-O Seo1, Mingoo Seok2, SeongHwan Cho1
One of the notable trends in convolutional neural network (CNN) processor architecture is to embrace analog hardware to improve energy efficiency in performing multiply-andaccumulate (MAC). Prior works investigated charg
ISSCC 2021 Session 5 Analog Circuits
A 5V Dynamic Class-C Paralleled Single-Stage Amplifier with Near-Zero Dead-Zone Control and Current-Redistributive Rail-to-Rail Gm-Boosting Technique
Seok-Tae Koh, Ji-Hun Lee, Gyeong-Gu Kang, Hyunki Han, Hyun-Sik Kim
One of the most key analog blocks in VLSI is probably the buffer amplifier dedicated to driving large off-chip loads. However, achieving fast settling-time and high output current drivability over a wide input voltage ra
ISSCC 2021 Session 32 Clocking & PLLs
A 365fsrms-Jitter and −63dBc-Fractional Spur 5.3GHz-RingDCO-Based Fractional-N DPLL Using a DTC Second/ThirdOrder Nonlinearity Cancelation and a Probability-DensityShaping ΔΣM
Hangi Park*1, Chanwoong Hwang*1, Taeho Seong*1,2, Yongsun Lee3, Jaehyouk Choi1
data-rates by combining more carrier components, 5G RF transceivers require many carrier frequencies, resulting in the situation of many LC PLLs occupying a large silicon area. Ring-oscillator-based digital PLLs (RO-DPLL
ISSCC 2021 Session 28 Medical & Bio
A 22.6µW Biopotential Amplifier with Adaptive Common-Mode Interference Cancelation Achieving Total-CMRR of 104dB and CMI Tolerance of 15Vpp in 0.18µm CMOS
Nahmil Koo1, Hyojun Kim2, SeongHwan Cho1
Korea Aerospace Research Institute, Daejeon, Korea 1 2 Improving robustness to common-mode interference (CMI) is imperative for reliable two-electrode ECG recording. CMI degrades the signal quality in two ways. First, it
ISSCC 2021 Session 17 Power Management
A 90.5%-Efficiency 28.7µVRMS-Noise Bipolar-Output HighStep-Up SC DC-DC Converter with Energy-Recycled Regulation and Post-Filtering for ±15V TFT-Based LAE Sensors
Min-Woo Ko, Hyunki Han, Hyun-Sik Kim
The applications of large-area electronics (LAEs) based on thin-film transistors (TFTs) are rapidly expanding from displays to sensors. For the TFT gate drivers, high-voltage bipolar supply rails (approximately ±15V) are
ISSCC 2019 Session 9 mm-Wave
A 28GHz 20.3%-Transmitter-Efficiency 1.5°-Phase-Error Beamforming Front-End IC with Embedded Switches and Dual-Vector Variable-Gain Phase Shifters
Jinseok Park*1, Seungchan Lee*1, Dongho Lee2, Songcheol Hong1
Hanbat National University, Daejeon, Korea *Equally-Credited Authors (ECAs) 1 respectively. The NF of RX at 28GHz is 4.58dB, which is increased only by 1dB compared to simulated NF of LNA without switch and PA. NF variat
ISSCC 2019 Session 7 AI / ML
LNPU: A 25.3TFLOPS/W Sparse Deep-Neural-Network Learning Processor with Fine-Grained Mixed Precision of FP8-FP16
Jinsu Lee, Juhyoung Lee, Donghyeon Han, Jinmook Lee, Gwangtae Park, Hoi-Jun Yoo
for energy-efficient deep learning (DL) acceleration [1-6]. Most prior DNN inference accelerators are trained in the cloud using public datasets; parameters are then downloaded to implement AI [1-5]. However, local DNN le
ISSCC 2019 Session 22 Medical & Bio
A 27.8μW Biopotential Amplifier Tolerant to 30Vpp Common-Mode Interference for Two-Electrode ECG Recording in 0.18μm CMOS
Nahmil Koo, SeongHwan Cho
Two-electrode ECG devices have gained popularity in the recent past to enable comfortable and long-term monitoring of cardiovascular health. As a ground or bias electrode is not used in a two-electrode ECG device, common
ISSCC 2018 Session 29 Medical & Bio
A 43.4μW Photoplethysmogram-Based Heart-Rate Sensor Using Heart-Beat-Locked Loop
Do-Hun Jang, SeongHwan Cho
Photoplethysmogram (PPG) sensors have gained great popularity in recent years as they can easily obtain heart rate (HR) in wearable devices such as smart watches and smart rings. However, one of the biggest problems for
ISSCC 2018 Session 13 AI / ML
A 9.02mW CNN-Stereo-Based Real-Time 3D Hand-Gesture Recognition Processor for Smart Mobile Devices
Sungpill Choi, Jinsu Lee, Kyuho Lee, Hoi-Jun Yoo
Recently, 3D hand-gesture recognition (HGR) has become an important feature in smart mobile devices, such as head-mounted displays (HMDs) or smartphones for AR/VR applications. A 3D HGR system in Fig. 13.4.1 enables user
ISSCC 2017 Session 14 AI / ML
DNPU: An 8.1TOPS/W Reconfigurable CNN-RNN Processor for General-Purpose Deep Neural Networks
Dongjoo Shin, Jinmook Lee, Jinsu Lee, Hoi-Jun Yoo
Recently, deep learning with convolutional neural networks (CNNs) and recurrent neural networks (RNNs) has become universal in all-around applications. CNNs are used to support vision recognition and processing, and RNNs
ISSCC 2016 Session 19 Digital Circuits
A 2.4GHz 1.5mW Digital MDLL Using Pulse-Width Comparator and Double Injection Technique in 28nm CMOS
Hyunik Kim1,2, Yongjo Kim1, Taeik Kim2, Hojin Park2, SeongHwan Cho1
low-jitter clock generator, as it does not suffer much from jitter accumulation [1-4]. By periodically replacing the output edge of the oscillator by a clean edge of the reference, an MDLL has a large effective loop band
ISSCC 2016 Session 14 Other
A 0.55V 1.1mW Artificial-Intelligence Processor with PVT Compensation for Micro Robots
Youchang Kim, Dongjoo Shin, Jinsu Lee, Yongsu Lee, Hoi-Jun Yoo
applications, such as unmanned delivery services. The robots, shown in Fig. 14.3.1, have enhanced controllers that realize AI functions, such as perception (information extraction) and cognition (decision making). Histor
ISSCC 2015 Session 18 Digital Processors
A 0.5V 54µW Ultra-Low-Power Recognition Processor with 93.5% Accuracy Geometric Vocabulary Tree and 47.5% Database Compression
Youchang Kim, Injoon Hong, Hoi-Jun Yoo
Microwatt object recognition is being considered for many applications, such as autonomous micro-air-vehicle (MAV) navigation, a vision-based wake-up or user authentication for the smartphones, and a gesture recognition-
ISSCC 2015 Session 13 RF & Wireless
A 227pJ/b -83dBm 2.4GHz Multi-Channel OOK Receiver Adopting Receiver-Based FLL
Lee Jae-Seung1, Kim Joo-Myoung1, Lee Jae-Sup2, Han Seok-Kyun1, Lee Sang-Gug1
The OOK demodulator and symbol timing-recovery circuits convert the ED output into final digital bit streams. In Fig. 13.1.2, for the incoming OOK signal, the initial tuning for the VCO frequency is done by the AFC. The
ISSCC 2014 Session 17 Analog Circuits
A 0.9V 6.3μW Multistage Amplifier Driving 500pF Capacitive Load with 1.34MHz GBW
Wanyuan Qu1, Jong-Pil Im2, Hyun-Sik Kim1, Gyu-Hyeong Cho1, 1
of driving a large capacitive load with wide bandwidth are becoming more important for various applications. The conventional frequency compensation methods, however, are based on cumbersome transfer function derivations
ISSCC 2013 Session 6 Medical & Bio
An 87mA·min Iontophoresis Controller IC with DualMode Impedance Sensor for Patch-Type Transdermal Drug Delivery System
Kiseok Song, Unsoo Ha, Jaehyuk Lee, Kyeongryeol Bong, Hoi-Jun Yoo
Iontophoresis enhances drug penetration non-invasively into body tissue by electrical stimulation [1]. Compared with injection and oral dosage, it has advantages in the ease of use, the minimization of side effects, such
ISSCC 2013 Session 5 RF & Wireless
A New TX Leakage-Suppression Technique for an RFID Receiver Using a Dead-Zone Amplifier Then, IB, (W/L)13, and VLKG, but is not dependent on Vt.
Sang-Sung Lee1, Jaeheon Lee2, In-Young Lee1, Sang-Gug Lee1, Jinho Ko2
continuous wave (CW) to provide energy to the tag while the RX receives data from it. Due to the simultaneous operation of the RX and TX, large TX leakage is the main issue in securing RX sensitivity. Although external i
ISSCC 2013 Session 22 Sensors
A 5.6mV Inter-Channel DVO 10b Column-Driver IC with Mismatch-Free Switched-Capacitor Interpolation for Mobile Active-Matrix LCDs
Hyun-Sik Kim, Jun-Hyeok Yang, Sang-Hui Park, Seung-Tak Ryu, Gyu-Hyeong Cho
resolution and good channel-to-channel uniformity are required in column-driver ICs. In conventional column-driver ICs, the resistor-DAC (R-DAC) architecture has been generally used due to its uniform characteristic, bec
ISSCC 2013 Session 22 Sensors
A 55dB SNR with 240Hz Frame Scan Rate Mutual Capacitor 30×24 Touch-Screen Panel Read-Out IC Using Code-Division Multiple Sensing Technique
Hyungcheol Shin1, Seunghoon Ko1, Hongjae Jang1, Ilhyun Yun2, Kwyro Lee1
interfaces, such as multi-touch, pinch zoom-in/out gestures, thus expanding the smartphone market. However, capacitive touch-screen technology still suffers from performance degradation like a low frame scan rate and poo
ISSCC 2012 Session 6 Image Sensors
CMOS Capacitive Biosensor with Enhanced Sensitivity for Label-Free DNA Detection In addition, the device is also independent of duty asymmetry because the charging and discharging operations are repeated alternately with the same duration in a full cycle. This eliminates the DC drift in the output, resulting in robust and reproducible measurements.
Kang-Ho Lee, Sukhwan Choi, Jeong Oen Lee, Jun-Bo Yoon, Gyu-Hyeong Cho
electrical detection when used to quantify the hybridization of DNA molecules. They show rapid, robust, and inexpensive measurement and compatibility with commercial microfabrication technology. The real-time measurement
ISSCC 2012 Session 4 RF & Wireless
A Fully Integrated Dual-Mode CMOS Power Amplifier for WCDMA Applications
Bonhoon Koo1, Taehwan Joo1, Yoosam Na2, Songcheol Hong1
Samsung Electro-Mechanics, Suwon, Korea 1 Integrating a CMOS RF power amplifier (PA) into a single-chip transceiver is one of the most challenging works in implementing radio front-ends, which presents many advantages in
ISSCC 2012 Session 26 Wireless
An Interference-Aware 5.8GHz Wake-Up Radio for ETCS
Jeongki Choi1, Kanghyuk Lee2, Seok-Oh Yun2, Sang-Gug Lee1, Jinho Ko2
PHYCHIPS, Daejeon, Korea 1 2 Wake-up radios have been a popular transceiver architecture in recent years for battery-powered applications such as wireless body area networks (WBANs) [1], wireless sensor networks (WSNs) [
ISSCC 2012 Session 25 Memory
Gb/s Multi-Threaded BCH Encoder and Decoder for Multi-Channel SSD Controllers
Youngjoo Lee, Hoyoung Yoo, Injae Yoo, In-Cheol Park
Solid-state drives (SSDs), built with many flash memory channels, is usually connected to the host through an advanced high-speed serial interface such as SATA III associated with a transfer rate of 6Gb/s [1-2]. However,
ISSCC 2012 Session 17 Medical & Bio
A Sub-10nA DC-Balanced Adaptive Stimulator IC with Multimodal Sensor for Compact Electro-Acupuncture System
Kiseok Song, Hyungwoo Lee, Sunjoo Hong, Hyunwoo Cho, Hoi-Jun Yoo
stimulation, has been widely used for its effectiveness in pain relief since the 1970s [1] and later for treatment of various diseases such as depression, addiction, and gastrointestinal disorders [2], and non-medical ap
ISSCC 2012 Session 17 Medical & Bio
A 259.6µW Nonlinear HRV-EEG Chaos Processor with Body Channel Communication Interface for Mental Health Monitoring
Taehwan Roh, Sunjoo Hong, Hyunwoo Cho, Hoi-Jun Yoo
Recently, there are many reports on the measurement of mental health conditions as derived from physiological parameters – see references in [1]. Usually, heart-rate or heart rate variability (HRV) has been used for moni
ISSCC 2012 Session 16 Power Management
A High-Stability Emulated Absolute Current Hysteretic Control Single-Inductor 5-Output Switching DC-DC Converter with Energy Sharing and Balancing
Se-Won Wang1, Gyu-Ha Cho2, Gyu-Hyeong Cho1
JDA, Daejeon, Korea 1 2 Several types of DC-DC converters for active-matrix organic LED (AMOLED) displays have been introduced to date [1-4]. Single-inductor multiple-output (SIMO) converters with current-mode control ha
ISSCC 2011 Session 7 Digital Processors
A 57mW Embedded Mixed-Mode Neuro-Fuzzy Accelerator for Intelligent Multi-core Processor
Jinwook Oh, Junyoung Park, Gyeonghoon Kim, Seungjin Lee, Hoi-Jun Yoo
portable game consoles, and robots for such intelligent applications as object detection, recognition, and human-computer interfaces (HCI). Most of these functions are realized in software with neural networks (NN) and f
ISSCC 2011 Session 26 Wireless
An Isolator-less CMOS RF Front-End for UHF Mobile RFID Reader
Eun-Hee Kim1, Kwyro Lee1, Jinho Ko2, 1
research on how to guarantee a reliable RX performance under simultaneous TX/RX operation. To isolate RX from the TX self-jammer, the RFID transceivers are generally accompanied by an off-chip circulator or isolator. Thi
ISSCC 2011 Session 2 Medical & Bio
A 75µW Real-Time Scalable Network Controller and a 25µW ExG Sensor IC for Compact Sleep-Monitoring Applications
Seulki Lee, Long Yan, Taehwan Roh, Sunjoo Hong, Hoi-Jun Yoo
Recently, a wearable body-sensor network realized continuous sleep monitoring by ExG (EEG, EMG, EOG, and ECG) extraction from a sleeper’s face [1]. At least 14 sensors were placed on the face, and were managed by a netwo
ISSCC 2010 Session 18 AI / ML
A 345mW Heterogeneous Many-Core Processor with an Intelligent Inference Engine for Robust Object Recognition
Seungjin Lee, Jinwook Oh, Minsu Kim, Junyoung Park, Joonsoo Kwon, Hoi-Jun Yoo
challenges: (1) the large number of features to process requires high computational power, and (2) false matches from background clutter can degrade recognition accuracy. Previously, saliency based bottom-up visual atten
ISSCC 2010 Session 10 Power Management
A PLL-Based High-Stability Single-Inductor 6-channel Output DC-DC Buck Converter
Kwang-Chan Lee1, Chang-Seok Chae1, Gyu-Ha Cho2, Gyu-Hyeong Cho1, 1
particular for portable systems where typically multiple voltage levels are required to achieve multi functionality. To meet these requirements, a singleinductor multiple-output (SIMO) switching converter is a very stron
ISSCC 2009 Session 24 Wireless
A 10.8mW Body-Channel-Communication/MICS Dual-Band Transceiver for a Unified Body-SensorNetwork Controller
Namjun Cho, Joonsung Bae, Sunyoung Kim, Hoi-Jun Yoo
With the increasing number of portable and implantable personal health care devices, there is a strong demand to control their communication in a single wireless network. Recently, the IEEE 802.15 WBAN task group has dis
ISSCC 2008 Session 7 Other
A 1.12mW Continuous Healthcare Monitor Chip Integrated on a Planar Fashionable Circuit Board
Hyejung Kim, Yongsang Kim, Young-Se Kwon, Hoi-Jun Yoo
Recently, several research results have been reported on the integration of electronics with textiles such as the wearable computer and e-textiles [1-3]. Most of the previous works were based mainly on conducting threads