机构

University of Macau

58 篇 ISSCC 论文

ISSCC 2026 Session 7 Image Sensors
VoxCAD: A 0.82-to-81.0mW Intelligent 3D-Perception dToF SoC with Sector-Wise Voxelization and High-Density Tri-Mode eDRAM CIM Macro
Haoyang Sang*1, Zhao Wang*1, Longzhen He1, Guangshu Zhao1, Wenao Xie2, Bo Wang3, Rui P. Martins1, Man-Kay Law1
*Equally Credited Authors (ECAs) 1 Abstract VoxCAD, an intelligent low-power dToF SoC for end-to-end 3D perception applications, is presented with three features: 1) LiDAR dToF sensing-integrated 2D-ROI guided point clou
ISSCC 2026 Session 4 Analog Circuits
An Integrated Voltage and Current Reference Together Achieving 5.7 and 9.1ppm/°C from -40 to 125°C
Lele Fang, Yan Zhu, Rui P. Martins, Chi-Hang Chan
Abstract This work implements an integrated voltage and current reference circuit, which has low temperature drift. By ensuring the reuse of the main circuit, we propose a current-mirrorbased seamless transition techniqu
ISSCC 2026 Session 32 Data Converters
A 103.9dB-SFDR 83.8dB-SNDR 3MHz-BW Multi-Bit Quadratic-Exponential Noise-Coupled IDSM with High Tolerance to DAC Non-Linearity
Zhensheng Li1,2, Biao Wang3, Mingqiang Guo1, Rui P. Martins1, Sai-Weng Sin1
Abstract This paper presents a quadratic-exponential noise-coupled (NC) IDSM to achieve a quantization noise shaping effect greater than 4th order with OSR 22, while having high tolerance to DAC non-linearity and a small
ISSCC 2026 Session 27 AI / ML
A 17.9-to-22.4GHz 195.6±1.3dBc/Hz FoM Quad-Core Class-F-1 VCO Featuring Improved Synchronization Using a Circular Pentafilar Transformer-Based Tank
Yue Wu1, Yatao Peng1,2, Jiawei Li1, Fengen Yuan1, Jinge Li1, Jun Yin1, Rui P. Martins1, Pui-In Mak1
Abstract A 17.9-to-22.4GHz quad-core inverse-Class-F VCO achieving PN of −145.6 to −141dBc/Hz and an FoM of 194.3 to 196.9dBc/Hz is reported. The VCO features a circular pentafilar transformer tank that provides high Q1/
ISSCC 2026 Session 27 Clocking & PLLs
A 0.068mm2 8.5-to-12.7GHz Complementary Dual-Core VCO with Auto-2nd-Harmonic-Tracking Technique Achieving 202.7dBc/Hz Peak FoMT and 0.9dB-FoM Variation at a 1MHz Offset in a 39.6% Tuning Range
Xincheng Du1,2, Xiangxun Zhan1, Tincheng Ou1, Zaize Chen1, Jinge Li1, Haoran Li1, Zhizhan Yang3, Zhuo Xu1, Pui-In Mak1,
Abstract A complementary dual-core VCO with auto f2nd tracking is proposed to achieve consistently low PN and a high FoM over a wide tuning range (TR). Prototyped in 65nm CMOS, the proposed VCO achieves a peak FoM@1/10MH
ISSCC 2026 Session 26 Power Management
A Multi-Phase Hybrid Converter with Q Samplers Enabling Simultaneous IL Auto-Balance and Arbitrary Phase Count
Jiacheng Yang*, Zihao Tang*, Rui P. Martins, Mo Huang
*Equally Credited Authors (ECAs) Abstract The paper presents a multiple-phase hybrid converter with Q samplers. Split-TON control enables VCF auto-balance and arbitrary phase counts under all-phase interleaving, while 0V
ISSCC 2026 Session 16 Power Management
A Battery Charger Based On Mesh-Connection 2×CF Continuously-Scalable-Conversion-Ratio Converter Achieving 3.2W/mm3 Power Density
Yuanfei Wang1, Zhiyuan Zhang1, Yihan Zhang2, Rui P. Martins1, Mo Huang1
Abstract This work presents a battery charger for smartwatches based on a mesh-connected continuously scalable-conversion ratio converter that uses only two flying capacitors. The proposed design reduces the number of in
ISSCC 2026 Session 16 Power Management
A Parameter-Free Runtime-Energy-Loss Optimizer Achieving 2.15% Error in Energy-Recycling Duty-Cycled Systems
Jianxin Yang, Rui P. Martins, Mo Huang
Abstract This work proposes a predefined-parameter-free runtime-Eloss optimizer for energy-recycling duty-cycled systems. By leveraging a 3-level converter to recycle output-capacitance energy to the flying capacitor, it
ISSCC 2026 Session 16 Power Management
PV Energy-Harvesting Interface Using Reconfigurable Self-Clamp CSCR Converter Achieving 3.83× High-Efficiency VCR Ratio and Open-Voltage-Sense-Free MPPT
Ziyang Zhong, Rui P. Martins, Mo Huang
Abstract This work presents a PV energy harvesting interface using a self-clamp CSCR SC converter. It reduces VCF stress without additional SC stages, enabling low-voltage CFs, 17.1mW/mm2 power density and 90% peak PCE.
ISSCC 2025 Session 9 Power Management
A Bi-Directional Dual-Path Boost-48V-Buck Hybrid Converter for High-Voltage Power-Transmission Cable in Light-Weight Humanoid Robots
Wenjie Yang*1,2, Zhiguo Tong*1, Junwei Huang1, Rui P. Martins1, Yan Lu1,2,3
UM Hetao IC Research Institute, Shenzhen, China 3 Tsinghua University, Beijing, China 1 *Equally Credited Authors (ECAs) Humanoid robots have high potential to replace human labors for various tasks in the near future [1
ISSCC 2025 Session 9 Power Management
An 85-to-230VAC to 3.3-to-4.6VDC 1.52W Capacitor-Drop Sigma-Floating-SC AC-DC Converter with 81.3% Peak Efficiency
Fei Song*1, Shousheng Han*1,2, Rui P. Martins1, Yan Lu1,2
Tsinghua University, Beijing, China 1 2 *Equally Credited Authors (ECAs) The internet-of-things (IoT) and smart home devices, such as smart power meters and smart remote control, have great demand for high-efficiency, lo
ISSCC 2025 Session 32 Power Management
A 180MHz 45.3%-Peak-Efficiency Isolated Converter Using Q-Downsize Class-D Power Amplifier with Inherent Shoot-Through Current Blocking and High Tolerance for Efficiency Despite Frequency Misalignments
Tian Xia*1, Qiujin Chen*1, Shujing Wang1, Rui P. Martins1,2, Mo Huang1
Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 *Equally Credited Authors (ECAs) Isolated DC-DC converters [1-8] with low electromagnetic interference (EMI) are crucial for system safety and reliabi
ISSCC 2025 Session 31 Power Management
A 91.25% Peak Power-Conversion-Efficiency Capacitive PowerManagement IC Supporting up to 5.68mJ Burst Energy Delivery Using a Single External Capacitor for mm-Scale IoT Applications
Qishen Fang1, Feiyu Li1, Rui P. Martins1,2, Man-Kay Law1
Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 As Internet of Things (IoT) devices continue to shrink in size, the limited available system energy is becoming a major bottleneck. Even though the sy
ISSCC 2025 Session 24 Data Converters
A 72GS/s 9b Time-Interleaved Pipeline-SAR ADC Achieving 55.3/49.3dB SFDR at 20GHz/Nyquist Inputs in 16nm FinFET
Yannan Zhang1, Minglei Zhang1, Zehang Wu1, Yan Zhu1, Rui P. Martins1,2, Chi-Hang Chan1
traffic have driven optical modules to scale beyond 100Gb/s. This evolves aggressive bandwidth and SNDR frontiers for their ADCs in the receiver to cope with advanced modulations and oversampling rates. Time-interleaving
ISSCC 2025 Session 24 Data Converters
A 10b 3GS/s Time-Domain ADC with Mutually Exclusive Metastability Correction and Wide Common-Mode Input
Zijian Liu1, Minglei Zhang1, Wei Zhang1, Yan Zhu1, Rui P. Martins1,2, Chi-Hang Chan1
unpredictable and non-Gaussian error behaviors in the A/D conversion, which cannot be tolerated by applications such as lowbit-error-rate serial link receivers, radar, and instrumentation [1-5]. Time-domain (TD) ADCs [6-
ISSCC 2025 Session 24 Data Converters
A PVT-Robust 2× Interleaved 2.2GS/s ADC with Gated-CCRO-Based Quantizer Shared Across Channels and Steps Achieving >4.5GHz ERBW
Junlin Zhong1, Minglei Zhang1, Yan Zhu1, Rui P. Martins1,2, Chi-Hang Chan1
Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 The demand for medium-resolution GS/s ADCs is increasing in DSP-based wireline communication. Enhancing energy and area efficiency of the unit ADC is cr
ISSCC 2025 Session 21 Power Management
A Segmented-Interlacing Multi-Phase Hybrid Converter with Inherently Auto-Balanced ILs and Boosted IL Slew Rate During Load Transients
Jiacheng Yang1, Rui P. Martins1,2, Mo Huang1
Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 In datacenters, direct conversion from a 12V input voltage VIN intermediate bus to point-of-load (PoL) is a common practice for powering computing chi
ISSCC 2025 Session 19 Clocking & PLLs
A PVT-Robust 5.5GHz Fractional-N Cascaded RO-Based Digital PLL with Voltage-Domain Feedforward Noise Cancellation
Yu Duan1, Yan Zhu1, Rui P. Martins1,2, Chi-Hang Chan1
Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 Ring-oscillator (RO)-based digital PLLs (DPLLs) are well-suited for multi-PLL-integrated SoC designs owing to their compactness and immunity to magnetic
ISSCC 2024 Session 8 Power Management
A Fast-Transient 3-Fine-Level Buck-Boost Hybrid DC-DC Converter with Half-Voltage-Stress on All Switches and 98.2% Peak Efficiency
Shuangxing Zhao1,2, Chenchang Zhan2, Yan Lu1
Southern University of Science and Technology, Shenzhen, China 1 Figure 8.4.3 exhibits the overall structure of the proposed buck-boost converter including the power stage and control stage. All circuits are implemented
ISSCC 2024 Session 7 Wireline I/O
A 0.027mm2 5.6-7.8GHz Ring-Oscillator-Based Ping-Pong Sampling PLL Scoring 220.3fsrms Jitter and −74.2dBc Reference Spur
Yunbo Huang1, Yong Chen1, Zunsong Yang2, Rui P. Martins1,3, Pui-In Mak1
Institute of Microelectronics of the Chinese Academy of Sciences, Beijing, China 3 Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 A ring oscillator (RO) based phase-locked loop (PLL) is a promising
ISSCC 2024 Session 31 Power Management
A SIDO/DISO VCF-Step-Reconfigurable Continuously ScalableConversion-Ratio SC Converter Achieving 91.4%/92.6% Peak Efficiency and Almost-lossless Channel Switching
Yuanfei Wang1, Mo Huang1, Rui Paulo Martins1,2, Yan Lu1
University of Lisboa, Lisbon, Portugal 1 2 In an energy harvesting (EH) system for the internet of things (IoT), the input voltage VIN may vary within a wide range, e.g., from 0.3 to 1.8V from a solar cell, while the bat
ISSCC 2024 Session 27 Wireless
A Differential Hybrid Class-ED Power Amplifier with 27W Maximum Power and 82% Peak E2E Efficiency for Wireless Fast Charging To-Go
Fangyu Mao, Rui Martins, Yan Lu
Portable power banks with wireless charging are popular on the market, targeting a wireless charging to-go experience. However, the low input voltage from the battery and the large equivalent series resistance (ESR) of t
ISSCC 2024 Session 22 Analog Circuits
A 12GS/s 12b 4× Time-Interleaved Pipelined ADC with Comprehensive Calibration of TI Errors and Linearized Input Buffer
Yuefeng Cao1, Minglei Zhang1, Yan Zhu1, R. P. Martins1,2, Chi-Hang Chan1
Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 Direct RF sampling relieves the analog front-end design and delivers high system flexibility. In >10GS/s >10b ADCs, time-interleaving (TI) is inescapab
ISSCC 2024 Session 17 Other
A Miniature Multi-Nuclei NMR/MRI Platform with a High-Voltage SOI ASIC Achieving a 134.4dB Image SNR with a 173×250×103µm3 Resolution
Shuhao Fan1, Qi Zhou1, Ka Meng LEI1, Rui P. Martins1,2, Pui-In Mak1
Instituto Superior Técnico/Universidade de Lisboa, Lisbon, Portugal 1 2 Magnetic resonance imaging (MRI), based on Nuclear Magnetic Resonance (NMR), is an indispensable tool for contemporary medicine. Moreover, the adven
ISSCC 2023 Session 30 Power Management
A Continuously Scalable-Conversion-Ratio SC Converter with Reconfigurable VCF Step for High Efficiency over an Extended VCR Range
Yuanfei Wang1,2, Mo Huang1, Yan Lu1, Rui P. Martins1,3
Zhuhai UM Science & Technology Research Institute, Zhuhai, China 3 Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 DC-DC converters are widely used in energy harvesting systems for maximum power poi
ISSCC 2023 Session 3 Other
A 12/13.56MHz Crystal Oscillator with Binary-Search-Assisted Two-Step Injection Achieving 5.0nJ Startup Energy and 45.8µs Startup Time
Haihua Li1, Ka-Meng Lei1, Pui-In Mak1, Rui P. Martins1,2
Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 Startup time (ts) and energy (ES) of crystal oscillators (XO) determine the efficiency of ultra-low-power duty-cycled IoT radios. MHz-range XOs take a
ISSCC 2023 Session 17 Data Converters
A 2×-Interleaved 9b 2.8GS/s 5b/cycle SAR ADC with Linearized Configurable V2T Buffer Achieving >50dB SNDR at 3GHz Input
Hongzhi Zhao1, Minglei Zhang1, Yan Zhu1, Chi-Hang Chan1, R. P. Martins1,2
Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 By increasing the number of bits in each conversion cycle, the sampling rate of SAR ADCs can be considerably extended while maintaining superior energ
ISSCC 2023 Session 11 Power Management
A Compact 12V-to-1V 91.8% Peak Efficiency Hybrid Resonant Switched-Capacitor Parallel Inductor (ReSC-PL) Buck Converter
Guigang Cai1, Yan Lu1, Rui P. Martins1,2
Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 High power density, high efficiency, and high voltage conversion ratio (VCR) DC-DC converters are in great demand for portable devices and autonomous
ISSCC 2023 Session 11 Power Management
A 42W Reconfigurable Bidirectional Power Delivery Voltage-Regulating Cable
Zhiguo Tong1, Junwei Huang1, Yan Lu1, Rui P. Martins1,2
Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 The universal serial bus (USB) has become really universal in recent years, with power delivery and all kinds of data protocols connected through a si
ISSCC 2023 Session 11 Power Management
A 12V-to-1V Quad-Output Switched-Capacitor Buck Converter with Shared DC Capacitors Achieving 90.4% Peak Efficiency and 48mA/mm3 Power Density at 85% Efficiency
Tingxu Hu1, Mo Huang1, Yan Lu1, Rui P. Martins1,2
Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 Direct 12V-to-1V power delivery has become popular in datacenter applications. Multiple outputs regulated by switching regulators are favorable to red
ISSCC 2023 Session 10 Data Converters
A 25MHz-BW 77.2dB-SNDR 2nd-Order Gain-Error-Shaping and NS Pipelined SAR ADC Based on a Quantization-PredictionUnrolled Scheme
Hongshuai Zhang1, Yan Zhu1, Chi-Hang Chan1, R. P. Martins1,2
Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 Shaping the interstage gain error in two-step oversampling ADCs has demonstrated a decent error suppression with a variety of mechanisms. The intersta
ISSCC 2023 Session 10 Data Converters
A Single-Channel 12b 2GS/s PVT-Robust Pipelined ADC with Critically Damped Ring Amplifier and Time-Domain Quantizer
Yuefeng Cao1, Minglei Zhang1, Yan Zhu1, Chi-Hang Chan1, R. P. Martins1,2
Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 High-speed pipelined ADCs rely on fast and accurate residue amplification which often necessitates calibration, thus suffering from potential converge
ISSCC 2022 Session 24 RF & Wireless
A 266µW Bluetooth Low-Energy (BLE) Receiver Featuring an N-Path Passive Balun-LNA and a Pipeline Down-Mixing BB-Extraction Scheme Achieving 77dB SFDR and -3dBm OOB-B-1dB
Haijun Shao1, Pui-In Mak1, Gengzhen Qi2, Rui P. Martins1,3
University of Lisboa, Lisbon, Portugal 1 3 Ultra-low-power short-range radios are the cornerstone of building a world with the Internet-of-Everything connectivity. To secure a high sensitivity at a sub-mW power budget, s
ISSCC 2022 Session 22 AI / ML
A 108nW 0.8mm2 Analog Voice Activity Detector (VAD) Featuring a Time-Domain CNN as a Programmable Feature Extractor and a Sparsity-Aware Computational Scheme in 28nm CMOS
Feifei Chen1, Ka-Fai Un1, Wei-Han Yu1, Pui-In Mak1, Rui P. Martins1,2
University of Lisboa, Lisbon, Portugal 1 2 An ultra-low-power always-on voice activity detector (VAD) is the key enabler of acoustic sensing in wearables. The VAD listens to the environment and wakes up the main system o
ISSCC 2022 Session 18 Power Management
A Battery-Input Sub-1V Output 92.9% Peak Efficiency 0.3A/mm2 Current Density Hybrid SC-Parallel-Inductor Buck Converter with Reduced Inductor Current in 65nm CMOS
Guigang Cai1, Yan Lu1, Rui Martins1,2
University of Lisboa, Lisbon, Portugal 1 2 The profile of portable and wearable devices keeps shrinking, demanding high current density power management integrated circuits. Switched-capacitor (SC) converters and buck co
ISSCC 2022 Session 18 Power Management
A 4A 12-to-1 Flying Capacitor Cross-Connected DC-DC Converter with Inserted D>0.5 Control Achieving >2× Transient Inductor Current Slew Rate and 0.73× Theoretical Minimum Output Undershoot of DSD
Tingxu Hu1, Mo Huang1, Yan Lu1, Rui P. Martins1,2
University of Lisboa, Lisbon, Portugal 1 2 Automotive and industrial applications require a high-efficiency DC-DC converter to directly convert power from the 12V intermediate bus to a low-voltage point-of-load (PoL). Th
ISSCC 2021 Session 27 Data Converters
A 25MHz-BW 75dB-SNDR Inherent Gain Error Tolerance Noise-Shaping SAR-Assisted Pipeline ADC with Background Offset Calibration
Hongshuai Zhang1, Yan Zhu1, Chi-Hang Chan1, R. P. Martins1,2
Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 To suppress the gain error from dynamic-power amplifiers, recently presented approaches including gain-error shaping (GES) [1], digital amplifiers [2]
ISSCC 2021 Session 20 RF & Wireless
A 5.0-to-6.36GHz Wideband-Harmonic-Shaping VCO Achieving 196.9dBc/Hz Peak FoM and 90-to-180kHz 1/f3 PN Corner Without Harmonic Tuning
Hao Guo1, Yong Chen1, Pui-In Mak1, Rui P. Martins1,2
Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 Since 2001 [1], LC VCOs have been demonstrating significant improvements of figureof-merit (FoM) and 1/f3 phase noise (PN) corner [2-5] by exploring c
ISSCC 2020 Session 9 Data Converters
A 2.56mW 40MHz-Bandwidth 75dB-SNDR PartialInterleaving SAR-Assisted NS Pipeline ADC With Background Inter-Stage Offset Calibration
Yan Song1, Yan Zhu1, Chi Hang Chan1, Rui Paulo Martins1,2
Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 The noise-shaping SAR (NS-SAR) hybrid architecture has shown its potential in achieving tens of MHz bandwidth (BW) together with high resolution [1-2]
ISSCC 2020 Session 16 Data Converters
A 4× Interleaved 10GS/s 8b Time-Domain ADC with 16× Interpolation-Based Inter-Stage Gain Achieving >37.5dB SNDR at 18GHz Input
Minglei Zhang1, Yan Zhu1, Chi-Hang Chan1, Rui P. Martins1,2
University of Lisboa, Lisbon, Portugal 1 2 The ever-increasing data traffic in wireline communication systems has led to the demand for high-speed ADCs with a large input BW. Time-interleaved SAR ADCs with a large interl
ISSCC 2019 Session 3 Data Converters
A 0.6V 13b 20MS/s Two-Step TDC-Assisted SAR ADC with PVT Tracking and Speed-Enhanced Techniques
Minglei Zhang1, Chi-Hang Chan1, Yan Zhu1, Rui P. Martins1,2
Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 The two-step SAR ADC is an energy-efficient architecture for high-resolution applications, which faces headroom challenges from the voltage-domain resi
ISSCC 2019 Session 26 RF & Wireless
A 0.08mm2 25.5-to-29.9GHz Multi-Resonant-RLCM-Tank VCO Using a Single-Turn Multi-Tap Inductor and CM-Only Capacitors Achieving 191.6dBc/Hz FoM and 130kHz 1/f3 PN Corner
Hao Guo1, Yong Chen1, Pui-In Mak1, Rui P. Martins1,2
Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 VCO designs have evolved from single-resonant LC-tank VCOs to the recent multiresonant RLCM (Resistor-Inductor-Capacitor-Mutual-inductance) tank VCOs
ISSCC 2019 Session 20 Data Converters
A 72.6dB-SNDR 100MHz-BW 16.36mW CTDSM with Preliminary Sampling and Quantization Scheme in Backend Subranging QTZ
Wei Wang1, Chi-Hang Chan1, Yan Zhu1, Rui P. Martins1,2
Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 Driven by great demands for high data transfer rates in mobile communications, ADCs require wide bandwidths with low noise density and power consumpti
ISSCC 2019 Session 16 Clocking & PLLs
A -246dB Jitter-FoM 2.4GHz Calibration-Free RingOscillator PLL Achieving 9% Jitter Variation Over PVT
Xiaofeng Yang1, Chi-Hang Chan1, Yan Zhu1, Rui P. Martins1,2
Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 Low-jitter phase-locked loops (PLLs) are critical building blocks in various systems, including wireless and wireline communications and ADCs. LC osci
ISSCC 2018 Session 8 Wireless
A Reconfigurable Cross-Connected Wireless-Power Transceiver for Bidirectional Device-to-Device Charging with 78.1% Total Efficiency
Fangyu Mao1, Yan Lu1, Seng-Pan U1,2, Rui P. Martins1,3
Synopsys Macau, Macau, China 3 Instituto Superior Técnico/Universidade de Lisboa, Lisbon, Portugal 1 2 Wireless power transfer (WPT) via inductive coupling is a convenient way to charge power-starved portable/wearable de
ISSCC 2018 Session 3 Analog Circuits
A Regulation-Free Sub-0.5V 16/24MHz Crystal Oscillator for Energy-Harvesting BLE Radios with 14.2nJ Startup Energy and 31.8µW Steady-State Power
Ka-Meng Lei1, Pui-In Mak1, Man-Kay Law1, Rui P. Martins1,2
Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 This paper reports a regulation-free sub-0.5V crystal oscillator (XO) for Bluetooth Low-Energy (BLE) radios [1] that can be self-powered by harvesting
ISSCC 2018 Session 27 Power Management
A 0.22-to-2.4V-Input Fine-Grained Fully Integrated Rational Buck-Boost SC DC-DC Converter Using Algorithmic Voltage-Feed-In (AVFI) Topology Achieving 84.1% Peak Efficiency at 13.2mW/mm2
Yang Jiang1, Man-Kay Law1, Pui-In Mak1, Rui P. Martins1,2
Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 Most existing switched-capacitor (SC) DC-DC converters only offer a few voltage conversion ratios (VCRs), leading to significant efficiency fluctuatio
ISSCC 2018 Session 18 Digital Circuits
A 0.4V 430nA Quiescent Current NMOS Digital LDO with NAND-Based Analog-Assisted Loop in 28nm CMOS
Xiaofei Ma1,2, Yan Lu1, Rui P. Martins1,3, Qiang Li2
University of Electronic Science and Technology of China, Chengdu, China 3 Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal the number of registers. The fine loop contains an 8b SR, controlling eight 1×s
ISSCC 2017 Session 24 Wireless
A 0.18V 382μW Bluetooth Low-Energy (BLE) Receiver with 1.33nW Sleep Power for Energy-Harvesting Applications in 28nm CMOS
Wei-Han Yu1, Haidong Yi1, Pui-In Mak1, Jun Yin1, Rui P. Martins1,2
Instituto Superior Tecnico, Universidade de Lisboa, Portugal 1 2 For true mobility, wearable electronics should be self-powered by the environment. On-body thermoelectric (~50μW/cm2) is a maturing energy source but deliv
ISSCC 2017 Session 22 Wireless
A Reconfigurable Bidirectional Wireless Power Transceiver with Maximum-Current Charging Mode and 58.6% Battery-to-Battery Efficiency
Mo Huang1,a, Yan Lu1, Seng-Pan U1,2, Rui P. Martins1,3
Synopsys Macau, Macau, China 3 Instituto Superior Tecnico, Universidade de Lisboa, Portugal 1 2 a And the MUX7 needs to conduct the same current as MP and MN, which will double the area and conduction loss. 2) Under the