ISSCC 2025
Session 13
Other
An 18.5μW/qubit Cryo-CMOS Charge-Readout IC Demonstrating QAM Multiplexing for Spin Qubits
Tristan Meunier2, Jean-Baptiste Casanova3, Xavier Jehl4, Yvain Thonnart3, Franck Badets1 CEA-Léti, Grenoble, France Quobly, Grenoble, France 3 CEA-List, Grenoble, France 4 CEA-Pheliqs, Grenoble, France 1 2 Spin qubits ar
ISSCC 2025
Session 13
Other
Xiling: Cryo-CMOS 18-bit Dual-DAC Manipulator with 4.6μV Precision and 4.1nV/Hz0.5 Noise Co-Integrated with the Single Electron Transistor at 60mK
Southern University of Science and Technology, Shenzhen, China 3 Chengdu Data Automation System Technologies, Chengdu, China 1 2 Millions of physical quantum-bits (Qubits) are envisioned for a fault-tolerant quantum comp
ISSCC 2025
Session 13
Other
A Cryo-BiCMOS Controller for 9Be+-Trapped-Ion-Based Quantum Computers
Kaoru Yamashita1,3, Hiroki Ishikuro3, Christian Ospelkaus2, Vadim Issakov1 Technische Universität Braunschweig, Braunschweig, Germany Leibniz University Hannover, Hannover, Germany 3 Keio University, Yokohama, Japan 1 2
ISSCC 2025
Session 12
Other
Skin-Inspired Electronics: An Emerging Sensing and Computing Platform
Aarhus University, Aarhus, Denmark 1 2 Skin is the interface between our body and the environment. Its unique properties and sensing capabilities allow us to perceive the world around us. Information about shape, texture
ISSCC 2025
Session 12
Other
Reversing Scattering to Perform Deep-Tissue Optical Imaging and the Current Need for a Suitable Optoelectronic Solution Changhuei Yang
is on the order of 100 microns. This extreme turbidity prevents scientists and clinicians from performing deeply penetrating high resolution optical imaging through humans and animal models alike. The challenge associate
ISSCC 2025
Session 12
Other
p-Circuits: Neither Digital nor Analog
circuits aim to solve important problems with ultra-high efficiency, making use of analog and digital circuits, with well-known trade-offs. This work is about a new paradigm which is neither analog nor digital, we call i
ISSCC 2025
Session 12
Other
Circuits that Solve Optimization Problems by Exploiting Physics Inequalities
Optimization is vital to Engineering, Artificial Intelligence, and to many areas of Science. Mathematically, we usually employ steepest-descent, or other digital algorithms. For example, Deep Learning is an optimization
ISSCC 2024
Session 25
Other
Toward Exponential Growth of Therapeutic Neurotechnology
Motif Neurotech, Houston, TX 1 2 Bioelectronic devices that manipulate and record human neural activity could help patients suffering from debilitating health conditions not effectively treated by drugs. Here we discuss
ISSCC 2024
Session 25
Other
Extreme Wave-Based Metastructures Nader Engheta
opportunities for unprecedented control of electromagnetic and optical signals with numerous applications. In order to sculpt and manipulate waves to achieve exciting functionalities, we need materials. Judiciously engin
ISSCC 2024
Session 25
Other
Short-Reach Silicon Photonic Interconnects with Quantum Dot Mode Locked Laser Comb Sources
Alice Mo1, Jahyun Koo1, David McCarthy1, Noah Pestana2, Skylar Deckoff-Jones2, Christopher Poulton2, Michael Frankel3, Jock Bovington4, Luke Theogarajan1, John Bowers1 University of California, Santa Barbara, CA Analog P
ISSCC 2024
Session 23
Other
A 7.6mW IR-UWB Receiver Achieving -13dBm Blocker Resilience with a Linear RF Front-End
Gururaja Kasanadi Ramachandra, Yunus Baykal, Mario Konijnenburg, Yao-Hong Liu, Christian Bachmann, Peng Zhang imec, Eindhoven, The Netherlands 802.15.4a/z enabled IR-UWB TRXs [1-4] are being widely deployed into secured
ISSCC 2024
Session 23
Other
A 167μW 71.7dB-SFDR 2.4GHz BLE Receiver Using a Passive
Haijun Shao1, Rui P. Martins1,2, Pui-In Mak1 University of Macau, Macau, China University of Lisboa, Lisboa, Portugal 1 2 The Bluetooth Low-Energy (BLE) receivers evolved from their traditional active RF frontends [1,2]
ISSCC 2024
Session 23
Other
A Passive Crystal-Less Wi-Fi-to-BLE Tag Demonstrating Battery-Free FDD Communication with Smartphones
of Things (IoT) applications become increasingly widespread, wireless connectivity presents stringent requirements on low power, low cost, and compatibility with widely deployed commodity hardware such as BLE/Wi-Fi-embed
ISSCC 2024
Session 23
Other
A 1mm2 Software-Defined Dual-Mode Bluetooth Transceiver with 10dBm Maximum TX Power and -98.2dBm Sensitivity 2.96mW RX Power at 1Mb/s
Alexandre Vouilloz, Ernesto Pérez Serna, Anjana Dissanayake, Pascal Persechini, Vladimir Kopta, Erwan Le Roux, Francesco Chicco, Stefano Cillo, Nicola Gerber, Cédric Barbelenet, Fabio Epifano, Paulo A. Dal Fabbro, Nicola
ISSCC 2024
Session 23
Other
A 44μW IoT Tag Enabling 1μs Synchronization Accuracy and OFDMA Concurrent Communication with Software-Defined Modulation
2 Backscatter tags have proven advantageous in reducing the power consumption of ultralow upload data-rate IoT devices from milliwatts to tens of microwatts [1,2]. Previous backscatter ICs generally employ codeword trans
ISSCC 2024
Session 21
Other
A -106.3dB THD+N Feedback-After-LC Class-D Audio Amplifier Employing Current Feedback to Enable 530kHz LC-Filter Cut-Off Frequency
Goodix Technology, Nijmegen, The Netherlands 1 2 Class-D amplifiers (CDAs) are used in various audio applications thanks to their high power efficiency. However, they produce high-frequency switching energy that poses EMI
ISSCC 2024
Session 21
Other
A 121.7dB DR and -109.0dB THD+N Filterless Digital-Input Class-D Amplifier with an HV Multibit IDAC Using Tri-level Output and Employing a Transition-Rate-Balanced Bidirectional RTDEM Scheme
Digital-input Class-D amplifiers (CDAs) are widely used in audio applications and offer high power efficiency and high levels of integration. As human ears have a dynamic range (DR) of ~130dB, high DR is preferred in high-
ISSCC 2024
Session 17
Other
V 988nW Time-Domain Audio Feature Extraction for Keyword Spotting Using Injection-Locked Oscillators
Always-on, voice-activated tinyML systems, like those implementing keyword spotting (KWS), demand low power consumption and a small footprint. In certain instances, subV energy-harvesting sources restrict the available s
ISSCC 2024
Session 17
Other
Droplet Microfluidics Co-Designed with Real-Time CMOS Luminescence Sensing and Impedance Spectroscopy of 4nL Droplets at a 67mm/s Velocity
cell-based biosensors (CBBs)
ISSCC 2024
Session 17
Other
Fully Integrated CMOS Ferrofluidic Biomolecular Processing
Dongwon Lee*1, Kyung-sik Choi*1, Fuze Jiang*1, Hangxing Liu1, Doohwan Jung2, Ying Kong1, Marco Saif1, Zhikai Huang1, Jing Wang1, Hua Wang1 ETH Zürich, Zurich, Switzerland Qualcomm, Santa Clara, CA *Equally Credited Autho
ISSCC 2024
Session 17
Other
A 24V Mini-Coil Magnetic Neural Stimulator with Closed-Loop Deadtime Control and ZCS Control Achieving 99.76% Charge Recovery Efficiency to a short pulse PW1 by comparing it with the comparator’s reference voltage (VREF1). PW1 is then routed to the DT controller, which outputs EN1 and the rising edge of EN2. The falling edge of EN2 is generated by the second pulse generator followed by the ZCS controller.
of EN2 (i.e., DTEN) does not reflect the actual DT, due to the switching time of Q1-Q4 and Rice University, Houston, TX *Equally Credited Authors (ECAs) Neural stimulation has a variety of applications in neuroscience res
ISSCC 2024
Session 17
Other
Environmentally-Friendly Disposable Circuit and Battery System for Reducing Impact of E-Wastes solution ((CH3COO)2Mg) with air (O2). Since a voltage of 10V or higher was required to operate the organic circuit, 12 series-connected cells were fabricated. This battery could maintain the voltage of more than 10V at a current of 100μA for more than 3 hours.
Tatsuyuki Makita3, Masahiro Tanabe3, Takahiro Wakimoto3, Shohei Kumagai2, Hideyuki Nosaka1, Atsushi Aratake1, Toshihiro Okamoto2, Shun Watanabe2, Jun Takeya2, Takeshi Komatsu1 The developed circuit and battery system was
ISSCC 2024
Session 17
Other
A Miniature Multi-Nuclei NMR/MRI Platform with a High-Voltage SOI ASIC Achieving a 134.4dB Image SNR with a 173×250×103µm3 Resolution
Instituto Superior Técnico/Universidade de Lisboa, Lisbon, Portugal 1 2 Magnetic resonance imaging (MRI), based on Nuclear Magnetic Resonance (NMR), is an indispensable tool for contemporary medicine. Moreover, the adven
ISSCC 2024
Session 17
Other
A 9mW Ultrasonic Through Transmission Transceiver for Non-Invasive Intracranial Pressure Sensing
(ICP) measures the pressure exerted by fluids and tissues inside the skull, typically 7-15mmHg for healthy adults. Conditions such as traumatic brain injury, hydrocephalus, and intracranial hemorrhage often cause elevated
ISSCC 2024
Session 17
Other
Omnidirectional Magnetoelectric Power Transfer for Miniaturized Biomedical Implants via Active Echo
Jacob T. Robinson, Kaiyuan Yang Rice University, Houston, TX Wireless, batteryless, and miniaturized implants promise transformative therapies for various neurological, psychiatric, and cardiac disorders. Beyond conventi
ISSCC 2024
Session 15
Other
A 22nm 10.8Mb Embedded STT-MRAM Macro Achieving over 200MHz Random-Read Access and a 10.4MB/s Write Throughput with an In-Field Programmable 0.3Mb MTJ-OTP for High-End MCUs
Masayuki Izuna, Koichi Takeda, Yoshinobu Kaneda, Takahiro Shimoi, Hidenori Mitani, Takashi Ito, Takashi Kono Renesas Electronics, Tokyo, Japan As the range of applications for industrial and IoT devices expands, such as
ISSCC 2024
Session 15
Other
A 32Mb RRAM in a 12nm FinFet Technology with a 0.0249μm2
Yi-Cheng Huang, Shang-Hsuan Liu, Hsu-Shun Chen, Hsin-Chang Feng, Chih-Feng Li, Chou-Ying Yang, Wei-Keng Chang, Chang-Feng Yang, Chun-Yu Wu, Yen-Cheng Lin, Tsung-Tse Yang, Chih-Yang Chang, Wen-Ting Chu, Harry Chuang, Yih
ISSCC 2024
Session 15
Other
e-Chimera: A Scalable SRAM-Based Ising Macro with Enhanced-Chimera Topology for Solving Combinatorial Optimization Problems Within Memory
Ising machines, hardware accelerators based on the Ising model, have recently gained interest as alternative computers for solving combinatorial optimization problems (COPs) in various industrial fields with practical app
ISSCC 2024
Session 15
Other
LISA: A 576×4 All-in-One Replica-Spins Continuous-Time Latch-Based Ising Computer Using Massively-Parallel Random-Number Generations and Replica Equalizations
Sejong University, Seoul, Korea *Equally Credited Authors (ECAs) independently interact with their neighboring spins in the corresponding position from their group while the replica equalization switches are off. After t
ISSCC 2024
Session 15
Other
Self-Enabled Write-Assist Cells for High-Density SRAM in a Resistance-Dominated Technology Node
proposed schemes, according to the number of rows per BL (RPB). As the RPB decreases, the proportion of the write assist circuits to the bit cells becomes larger; thus, the area overhead increases. On the other hand, inc
ISSCC 2024
Session 15
Other
A 3nm FinFET 4.3GHz 21.1Mb/mm2 Double-Pumping 1-Read and 1-Write Pseudo-2-Port SRAM with Folded-Bitline Multi-Bank Architecture
2-port (dual-port) SRAM is one of the major challenges to achieve maximum frequency (fMAX) operation and memory cell density for high-performance computing (HPC) applications: such as massively parallel-processing, imagi
ISSCC 2024
Session 15
Other
A 2048×60m4 SRAM Design in Intel 4 with an Around-the-Array Power-Delivery Scheme Using PowerVia
Anandkumar Mahadevan Pillai, Kunal Bannore, Tri Doan, Muktadir Rahman, Gwanghyeon Baek, Clifford Ong, Xiaofei Wang, Zheng Guo, Eric Karl Intel, Hillsboro, OR The ever-increasing demand for energy-efficient computing motiv
ISSCC 2024
Session 15
Other
A 0.795fJ/bit Physically-Unclonable Function-Protected TCAM for a Software-Defined Networking Switch the activated cell data are modified by the driver via BL and BLB. To weaken the force of the cell, the supply voltage for the bit cell is isolated from VDD by a PMOS header. In the second cycle, the write driver loads the 0s and the other rows are activated.
Shaojun Wei1, Yang Hu1, Shouyi Yin1 3 The priority requirement induces frequent data movement. A priority rank unit (PRU) is implemented to skip rule shifting during updates. Weak-dependent rules are detected offline and
ISSCC 2024
Session 11
Other
Metis AIPU: A 12nm 15TOPS/W 209.6TOPS SoC for Cost- and Energy-Efficient Inference at the Edge
Bram Rooseleer, Jeroen Van Loon, Roel Uytterhoeven, Florian Zaruba, Spyridoula Koumousi, Milos Stanisavljevic, Stefan Mach, Sebastiaan Mutsaards, Riduan Khaddam Aljameh, Gua Hao Khov, Brecht Machiels, Cristian Olar, Anas
ISSCC 2024
Session 11
Other
A 3D integrated Prototype System-on-Chip for Augmented Reality Applications Using Face-to-Face Wafer Bonded 7nm Logic at <2μm Pitch with up to 40% Energy Reduction at Iso-Area Footprint The 3D clock forwarding methodology enables extension of the SMEM from 16 to 32MB without expanding the original area footprint (4.6MB/mm2). The SMEM access energy is measured for both top die and bottom die banks to be 1.84 and 1.99pJ/B, respectively, at nominal frequency of 500MHz (Fig. 11.2.3) with 0.15pJ/B attributed to the inter-die access. From post-layout RC extracted simulations, only 0.03pJ/B of the access energy is attributed to the 3D interconnects. While on-die temperatures may be a concern for
Tony F. Wu, Huichu Liu, H. Ekin Sumbul, Lita Yang, Dipti Baheti, Jeremy Coriell, William Koven, Anu Krishnan, Mohit Mittal, Matheus Trevisan Moreira, Max Waugaman, Laurent Ye, Edith Beigné As a case study, we augmented a
ISSCC 2024
Session 11
Other
AMD InstinctTM MI300 Series Modular Chiplet Package – HPC and AI Accelerator for Exa-Class Systems
MA 1 4 The AMD InstinctTM MI300 Series accelerators were conceptualized to extract maximum HPC and AI capability from the latest silicon and advanced packaging technology, designed to operate as CPU hosted PCIe® device,
ISSCC 2023
Session 3
Other
A 0.5-to-400MHz Programmable BAW Oscillator with Fractional Output Divider Achieving 4ppm Frequency Stability over Temperature and <95fs Jitter
Peeyoosh Mirajkar1, Raghavendra Reddy1, Harish Ramesh1, Bichoy Bahr2, Jagdish Chand1, Uday Meda1, Baher Haroun2, Shankar Karantha1, Ernest Yen3, Keegan Martin2, Daniel Gan4, Amin Sijelmassi2, Sankaran Aniruddhan5 Texas I
ISSCC 2023
Session 3
Other
A 0.954nW 32kHz Crystal Oscillator in 22nm CMOS with Gm-C-Based Current Injection Control
oscillators (XOs) [1-5] are essential in wirelessly linked IoT nodes: for time-keeping purposes, they need to consume low power since they stay always-on and remain accurate to reduce synchronization guard time [6]. In r
ISSCC 2023
Session 3
Other
A 16MHz XO with 17.5µs Startup Time Under 104ppm-∆F Injection Using Automatic Phase-Error Correction Technique
significantly influenced the power consumption of duty-cycled Internet-of-Things (IoT) systems. The injection techniques [1-5] have gained popularity for effectively reducing the start-up time and start-up energy (ES) of
ISSCC 2023
Session 3
Other
A 12/13.56MHz Crystal Oscillator with Binary-Search-Assisted Two-Step Injection Achieving 5.0nJ Startup Energy and 45.8µs Startup Time
Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 Startup time (ts) and energy (ES) of crystal oscillators (XO) determine the efficiency of ultra-low-power duty-cycled IoT radios. MHz-range XOs take a
ISSCC 2023
Session 3
Other
A 1.4µW/MHz 100MHz RC Oscillator with ±1030ppm Inaccuracy from -40°C to 85°C After Accelerated Aging for 500 Hours at 125°C
preferred clock source in many applications, which typically have used bulky crystal or MEMS oscillators. Using novel methods to compensate for the frequency inaccuracy caused by the temperature coefficient (TC) of the r
ISSCC 2023
Session 3
Other
A 0.01mm2 10MHz RC Frequency Reference with a 1-Point On-Chip-Trimmed Inaccuracy of ±0.28% from -45°C to 125°C in 0.18µm CMOS
Silicon Integrated, Eindhoven, The Netherlands, 3Tsinghua University, Beijing, China *Equally-Credited Authors (ECAs) 1 2 CMOS frequency references based on RC oscillators are usually preferred over bulky crystals in IoT
ISSCC 2023
Session 3
Other
Bandpass Filter and Oscillator ICs with THD < -140dBc at 10Vppd for Testing High-Resolution ADCs
Indian Institute of Technology Madras, Chennai, India 1 2 The growing demand for high-resolution (18 to 20bit) precision ADCs has increased the need for very low THD (< -140dBc) testing hardware that can simultaneously c
ISSCC 2023
Session 3
Other
A Chopper-Stabilized Amplifier with a Relaxed Fill-In Technique and 22.6pA Input Current
now at Broadcom, Bunnik, The Netherlands 1 2 In chopper amplifiers, the interaction between the input signal and the chopper clock can cause intermodulation distortion (IMD). This is due to amplifier delay, which causes
ISSCC 2023
Session 27
Other
The Promise of 2-D Materials for Scaled Digital and Analog Applications
Quentin Smets, Aryan Afzalian, Rutger Duflou, Xiangyu Wu, Gioele Mirabelli, Rongmei Chen, Inge Asselberghs, Gouri Sankar Kar imec, Leuven, Belgium Until the early 2000s, two-dimensional (2-D) materials were presumed to b
ISSCC 2023
Session 27
Other
The Tall Thin Molecular Programmer Erik Winfree
the transistor in 1947, with transistor counts roughly doubling every two years and now exceeding 100 billion on a single chip. One reason this was possible is that computers are an information technology, which permits
ISSCC 2023
Session 27
Other
Some Recent Progress in Bioelectronics John Rogers
with features that adapt, resorb and reconstruct in a time-dynamic manner to sustain life processes. Bio-integrated electronic systems that capture certain of these essential attributes, in the form of closed-feedback ne
ISSCC 2023
Session 22
Other
A 0.81mm2 740µW Real-Time Speech Enhancement Processor Using Multiplier-Less PE Arrays for Hearing Aids in 28nm CMOS
Speech enhancement (SE) is a task to improve voice quality and intelligibility by removing noise from the audio, which is widely adopted in hearing assistive devices. Hearing aids are generally worn in or behind the ear,
ISSCC 2023
Session 22
Other
DL-VOPU: An Energy-Efficient Domain-Specific Deep-LearningBased Visual Object Processing Unit Supporting Multi-Scale Semantic Feature Extraction for Mobile Object Detection/Tracking Applications
years, deep learning-based visual object detection/tracking (VODT) has been widely used in intelligent applications such as autonomous driving, UAV, smart robot and VR/AR. As general AI hardware platforms, GPUs and gener
ISSCC 2023
Session 22
Other
A 28nm 11.2TOPS/W Hardware-Utilization-Aware Neural-Network Accelerator with Dynamic Dataflow
Research Institute, Hsinchu, Taiwan 1 With the rapid evolution of AI technology, various neural network structures have been developed for diverse applications. As a typical ease, Fig. 22.4.1 shows that the convolution (