Tsinghua University

Abstract This work presents a system-level scalable wireless power receiver (RX) network for miniaturized distributed somatosensory cortex stimulation. By interconnecting the power outputs of all RX cells in the network,

Abstract This paper presents a 180-240Gb/s analog-intensive PAM-4 transmitter in 65nm CMOS process. A three-stage cascaded 2-to-1 analog MUX (AMUX) is employed to reduce the complexity and therefore the parasitic capacit

Abstract This paper presents a 98.5dB SNDR, 250kHz bandwidth CT incremental Zoom ADC. The design features a chopped capacitive front-end, Gm-C residue integrator, and 10b SAR ADC. A smart-tracking (ST) technique with dyn

Abstract LLMs face decoding bottlenecks. Speculative Decoding (SD) reduces latency via a small draft model for serial decoding and a large target model to verify in parallel. Despite this advantage, it still suffers from

Abstract 5G new-radio frequency-range-2 CMOS PAs with high peak-to-average-power ratios suffer from low efficiency, calling for compact and fast symbol-power-tracking (SPT) supply modulators (SMs). Inductor-based SPT sho

Abstract This work presents an inductor-at-middle hybrid buck converter for high-current density vertical power delivery, reusing the power inductors as signal feedback paths. The proposed switching-bus-multiplexing cont

Abstract This work proposes a CMOS hybrid common-gate current integrating sampler to address linearity, BW, and jitter limitations in prior wideband ADC front-ends. The front-end employs a hybrid common-gate V-I converte

Abstract 4D Gaussian Splatting (4DGS) has widespread applications in fields such as VR, AR and industrial simulation. However, 4DGS suffers from significant memory requirements, redundant computations and low PE utilizat

*Equally Credited Authors (ECAs) Abstract A modeling/rendering unified 3D GS processor is proposed with: 1) A locality-aware dynamic fine-grained rendering engine for reduced redundant computation. 2) A locality-optimize

*Equally Credited Authors (ECAs) Abstract To accelerate Visual Autoregressive (VAR) applications, this work implements a 28nm VAR accelerator achieving 47.3TFLOPs/W and <0.6% FID loss. A differential visual attention amp

Abstract This work presents a 28nm deeply power-scalable reconfigurable series-resonance/ClassF VCO with mutual-inductance self-cancellation and hybrid 8-shaped coupling techniques, achieving power scalability from 5.7 t

Abstract Pure microwave sources are vital for precision instrumentation, but conventional schemes are bulky and costly. CMOS oscillators are inexpensive and compact yet limited by phasenoise performance. To address this,

Abstract A 14GHz chopper-refolding sampling PLL is implemented in 28nm CMOS, integrating a kT/C-noise-cancellation sampling phase detector (SPD) and a self-injection VCO with harmonic-impedance expansion. The SPD decoupl

Abstract This work proposes a pipelined-SAR ADC featuring a current-buffer-based integrating sampler that presents a resistive input with good linearity. A floating charge transferrer (FCT) with multi-bit pre-conversion

Abstract We present SharpSAT, a heuristic-learning SAT accelerator that achieves fast solution times of 0.8$s for SAT and 16.1$s for UNSAT cases. Our design integrates: a fast clause learning unit that prunes the search

Gaxtrem Technology, Beijing, China 1 2 To maximize throughput, wireless standards often mandate channels with hundreds of MHz bandwidths (BWs) over multiple non-contiguous bands. In addition, as spectrally efficient comp

systems [1-4]. Compared to eddy-current displacement sensors [1], capacitive displacement sensors are potentially more energy efficient [2-4]. However, they are more susceptible to electric-field interferences on an elec

The pipelined ADC is an attractive choice for high-speed and high-resolution applications. Its most important building block is the residue amplifier. Compared with conventional closed-loop amplifiers, open-loop amplifie

applications like virtual reality and embodied AI. Unlike traditional Neural Radiance Fields (NeRF) [1], the novel 3D Gaussian Splatting approach (3D GS) [2] circumvents NeRF’s frequent sampling and intensive network inf

Wideband (BW >100MHz) and high-dynamic-range (DR >70dB) ADCs are in high demand for next-generation wireless standards. Conventional ADC solutions face challenges in both performance and efficiency: CTDSMs demonstrate fav

relies on image sensors coupled with cloud processing or on-chip Artificial Intelligence (AI) processors have encountered significant challenges in terms of power consumption, delays arising from data transmission, and/or

small chip area [1-6], and so can potentially replace bulky crystal- or MEMS-based frequency references in cost-sensitive IoT applications. However, due to the large and nonlinear temperature dependence of on-chip resist

High-speed (>GS/s) medium-resolution (6-8b) ADCs are in high demand for wideband applications. The time-interleaved (TI) SAR ADC is widely used for its superior power efficiency. However, TI ADCs suffer from timing-skew m

Voltage-controlled-oscillators (VCOs) with simultaneous low phase noise and wide frequency tuning range (FTR) spanning from tens GHz to millimeter-wave (mm-wave) bands are required for various standardized applications,

stricter requirements on the power consumption, silicon area, and phase noise specifications for local oscillators (LOs) in mobile and portable devices, especially in battery-powered mobile phones, notebook computers, an

Benefiting from good energy efficiency and fine ranging accuracy, impulse-radio ultrawideband (IR-UWB) has been revived recently for short-distance communications. The IR-UWB transceiver, however, faces two major issues

Sanechips Technology, Shenzhen, China 1 2 Silicon-based ultra-broadband terahertz (THz) generation has attracted growing interest in recent years, as it provides a low-cost and high-integration solution for high-resoluti

Next-generation wireless standards (e.g., WiFi-7) advancing towards wider bandwidth and higher order modulation require ADCs with GHz sampling rates and over 12b resolution. Although conventional pipelined ADCs can satis

The millimeter-wave (mm-wave) high-speed wireless communication has placed stringent requirements on the phase-noise performance of the local oscillators (LO), especially when a high-order modulation such as 1024-QAM is

increase of the speed and data-rate achieved by 5G. A major challenge in 6G is to provide a large transmitter output power (Pout) with high energy efficiency and linearity from a limited supply voltage to overcome high p

data-rates in wireless communications has driven the rapid development of silicon-based transceivers in the mm-wave and sub-THz bands. The broad available spectrum in D-band (110 to 170GHz) is attracting interest for sho

Peking University, Beijing, China 1 2 High-resolution (>100dB SNDR), kHz-BW ADCs are required by emerging IoT and smart sensing applications. These ADCs are desired for their high efficiency, but low cost and ease of int

Peking University, Beijing, China 1 2 Pipelined ADCs are widely used for high-speed high-resolution applications, but there are two challenges. First, limited by the kT/C noise requirement, its 1st-stage sampling capacit

Xidian University, Xi’an, China 3 University of Texas, Austin, TX 1 2 The noise-shaping (NS) SAR is an emerging hybrid architecture that aims to combine the benefits of both SAR and ∆Σ ADCs [1-8]. The key in an NS SAR is

The recent development of the 5th-generation (5G) communication sytems has set increasingly strict requirements on the spectral purity of millimeter-wave (mm-wave) local oscillators (LO). Low phase noise is crucial to en

have drawn increasing attention due to their simplicity, low power, zero static current, and PVT robustness. However, prior works show limited resolution (ENOB(13b) due to two main challenges. The 1st one is thermal nois

University of Texas, Austin, TX 1 2 As with any ADC with a front-end S/H, the SAR ADC suffers from a fundamental SNR challenge: its sampling kT/C noise. To satisfy the SNR requirement, the input capacitor has to be suffi

medical equipment has not been rapidly developed. For wireless medical applications, lossless connection and noninvasive transmission are important factors. Moreover, in medical imaging applications such as 4D ultrasound

Offering less than 1ppm frequency resolution, a ΔΣ fractional-N PLL enables flexible frequency planning and reliable spread spectrum modulation for digital clock generation [1, 2]. Use of low-cost ring VCOs however, mand