ISSCC 2012
Session 4
RF & Wireless
A 45nm SOI CMOS Class-D mm-Wave PA with >10Vpp Differential Swing
for higher integration of wireless transceivers in deeply-scaled silicon technologies. Given the overwhelming digital content of a mobile platform, ideally, the RF components should be realized with topologies that allow
ISSCC 2012
Session 4
RF & Wireless
A Fully Integrated Triple-Band CMOS Power Amplifier for WCDMA Mobile Handsets
Tetsuro Tamura2, Shigeaki Kawai2, Masahiro Kudo2, Tomotoshi Murakami2, Hiroyuki Nakamoto1, Nobumasa Hasegawa2, Hideki Kano2, Nobuhiro Shimazui2, Akiko Mineyama3, Kazuaki Oishi1, Masashi Shima4, Naoyoshi Tamura4, Toshihid
ISSCC 2012
Session 4
RF & Wireless
A 28.3mW PA-Closed Loop for Linearity and Efficiency Improvement Integrated in a +27.1dBm WCDMA CMOS Power Amplifier
The main challenge is to improve its power efficiency. Although many linearization and efficiency improvement techniques have been proposed, most of these techniques are based on feed-forward, which may not be effective
ISSCC 2012
Session 4
RF & Wireless
A Fully Integrated Dual-Mode CMOS Power Amplifier for WCDMA Applications
Samsung Electro-Mechanics, Suwon, Korea 1 Integrating a CMOS RF power amplifier (PA) into a single-chip transceiver is one of the most challenging works in implementing radio front-ends, which presents many advantages in
ISSCC 2012
Session 4
RF & Wireless
A 1-to-2.5GHz Phased-Array IC Based on gm-RC All-Pass Time-Delay Cells
shifters. Although a constant phase shift can approximate a time delay in a limited frequency band, this does not hold for larger arrays that scan over wide angles and have a large instantaneous bandwidth. In this case t
ISSCC 2012
Session 4
RF & Wireless
A Wideband IM3 Cancellation Technique for CMOS Attenuators
are used to limit the incident power to the level that the receiver circuitry can handle without degrading the linearity; in the transmitter path stringent power control is also desirable. Although variable-gain amplifie
ISSCC 2012
Session 4
RF & Wireless
8-Path Tunable RF Notch Filters for Blocker Suppression
The huge growth of the number of wireless devices makes wireless coexistence an increasingly relevant issue. If radios operate in close proximity, blockers as strong as 0dBm may occur, driving almost any receiver in comp
ISSCC 2012
Session 4
RF & Wireless
A Blocker-Tolerant Wideband Noise-Cancelling Receiver with a 2dB Noise Figure
narrowband off-chip RF filtering is not compatible with the concept of software-defined radio (SDR), an SDR receiver must be designed to tolerate large out-of-band blockers with minimal gain compression and noise figure
ISSCC 2012
Session 20
RF & Wireless
A 6.7-to-9.2GHz 55nm CMOS Hybrid Class-B/Class-C Cellular TX VCO
Lund University, Lund, Sweden 3 ST-Ericsson, Lund, Sweden 1 2 The design of very-wide-band CMOS voltage-controlled oscillators (VCOs) compliant with the phase-noise specifications of cellular transmitters is non-trivial,
ISSCC 2012
Session 20
RF & Wireless
A 32nm CMOS All-Digital Reconfigurable Fractional Frequency Divider for LO Generation in Multistandard SoC Radios With On-the-Fly Interference Management
sensitive to interference from other radio circuitry (e.g. on-chip PA), components of the SoC system (e.g. clocks and their harmonics) and nearby radios. To prevent VCO pulling by the PA, fractional dividers can be used
ISSCC 2012
Session 20
RF & Wireless
A Clip-and-Restore Technique for Phase Desensitization in a 1.2V 65nm CMOS Oscillator for Cellular Mobile and Base Stations
Base-station (BTS) RX oscillator phase noise requirements between 600kHz and 3MHz are difficult to satisfy using a fully monolithic VCO fabricated in bulkCMOS technology. The GSM-900-BTS and the DCS-1800-BTS RX specifica
ISSCC 2012
Session 20
RF & Wireless
A 36mW/9mW Power-Scalable DCO in 55nm CMOS for GSM/WCDMA Frequency Synthesizers
Lund University, Lund, Sweden 1 2 The RF front-ends of modern smart phones are becoming more complicated as newer standards are introduced (e.g. LTE). Reconfigurability can be used to reduce their size, provided that pow
ISSCC 2012
Session 20
RF & Wireless
A 40nm CMOS All-Digital Fractional-N Synthesizer without Requiring Calibration Frank Opteynde
Bang-Bang all-digital PLLs [1] for applications such as digital clock multiplication have existed for a long time, but show limited phase noise performance. Pioneering recent work [2-5] has demonstrated frequency synthes
ISSCC 2012
Session 20
RF & Wireless
A 14.2mW 2.55-to-3GHz Cascaded PLL with
However, their phase noise performance is typically worse than the integer-N [4, 5, 6] counterpart due to the quantization noise of the delta-sigma modulator (DSM). In this paper, we propose a low-noise fractional-N PLL
ISSCC 2012
Session 20
RF & Wireless
A 20Mb/s Phase Modulator Based on a 3.6GHz Digital PLL with -36dB EVM at 5mW Power
Polar or outphasing radio transmitter architectures promise higher efficiency than their Cartesian counterparts [1], but require the adoption of phase modulators with bandwidth about one order of magnitude wider than the
ISSCC 2011
Session 3
RF & Wireless
A Harmonic Rejection Mixer Robust to RF Device Mismatches
shown in Fig. 3.8.4. Loop Gain of this buffer at the low IF frequency helps to significantly reduce its gain and phase errors. Gains proportional to sine-wave coefficients are set by conductances proportional to sine-wav
ISSCC 2011
Session 3
RF & Wireless
A 1.0-to-4.0GHz 65nm CMOS Four-Element Beamforming Receiver Using a Switched-Capacitor Vector Modulator with Approximate Sine Weighting via Charge Redistribution
Frank E. van Vliet1,2 1 University of Twente, Enschede, The Netherlands, TNO Science and Industry, The Hague, The Netherlands 2 Phased-array receivers provide two major benefits over single-antenna receivers
ISSCC 2011
Session 3
RF & Wireless
A 40nm CMOS Highly Linear 0.4-to-6GHz Receiver Resilient to 0dBm Out-of-Band Blockers
reconfigurability to replace any standard radio: they develop toward systems where a simplified antenna interface can be used, with most dedicated filtering removed. This requires a receiver accommodating much higher lin
ISSCC 2011
Session 3
RF & Wireless
A Low-Power Process-Scalable Superheterodyne Receiver with Integrated High-Q Filters
low-IF, benefitting from a simple structure, and a high level of integration as image rejection is not a major concern, and channel selection is performed by low-frequency lowpass filters [Fig. 3.5.1(a)]. Dominated by li
ISSCC 2011
Session 3
RF & Wireless
A 65nm CMOS Pulse-Width-Controlled Driver with 8Vpp Output Voltage for Switch-Mode RF PAs up to 3.6GHz
Melina Apostolidou2, Leo C.N. de Vreede1, Domine Leenaerts2, Jan Sonsky3 1 Delft University of Technology, Delft, The Netherlands, NXP Semiconductors, Eindhoven, The Netherlands, 3 NXP-TSMC Research Center, Leuven, Belgi
ISSCC 2011
Session 3
RF & Wireless
A 2.5GHz 32nm 0.35mm2 3.5dB NF -5dBm P1dB Fully Differential CMOS Push-Pull LNA with Integrated 34dBm T/R Switch and ESD Protection
Intel, Hillsboro, OR Process scaling enables SoC integration of radio and large digital systems at reduced cost and area. Furthermore, the crowded spectrum requires high linearity receivers to enable co-existence in the
ISSCC 2011
Session 3
RF & Wireless
A 5.3GHz Digital-to-Time-Converter-Based Fractional-N All-Digital PLL
Advanced deep-submicron CMOS processes are well-suited for a digital implementation of phase-locked loop-(PLL) based frequency synthesizers. Recently, several RF all-digital phase-locked loops (ADPLL) have been reported
ISSCC 2011
Session 3
RF & Wireless
Spur-Free All-Digital PLL in 65nm for Mobile Phones
all-digital PLL (ADPLL) [1] for Bluetooth radios has proven benefits of CMOS scaling and integration, demonstrators for more challenging wireless standards have emerged [2-6]. In the ADPLL, however, the digitallycontroll
ISSCC 2011
Session 21
RF & Wireless
A Low-Power Wideband Polar Transmitter for 3G Applications
of the direct upconversion type. This architecture is versatile but requires calibration of the imbalance in its quadrature branches and DC offset at its inputs, and it is vulnerable to mixer noise. We believe it consume
ISSCC 2011
Session 21
RF & Wireless
A Fully Digital Multimode Polar Transmitter Employing 17b RF DAC in 3G Mode
Jose Moreira1, Hans Geltinger1, Timo Gossmann1, Peter Pfann1, Alexander Belitzer1, Thomas Bauernfeind3 1 Infineon Technologies, Neubiberg, Germany, Infineon Technologies, Villach, Austria, 3DICE, Linz, Austria 2 The cons
ISSCC 2011
Session 21
RF & Wireless
A Multiband LTE SAW-less Modulator with -160dBc/Hz RX-Band Noise in 40nm LP CMOS
receive band due to the finite duplexer TX to RX isolation. If this noise is not low enough, a SAW filter is needed before the Power Amplifier to preserve the RX sensitivity. Out-of-band noise is also an important concer
ISSCC 2011
Session 21
RF & Wireless
A Compact SAW-less Multiband WCDMA/GPS Receiver Front-End with Translational Loop for Input Matching
In FDD systems such as WCDMA, strong TX leakage presented at RX imposes stringent RX out-of-band (OOB) IIP3 and IIP2 requirements in addition to low noise figure (NF) requirement, usually necessitating an inter-stage SAW
ISSCC 2011
Session 21
RF & Wireless
A Receiver for WCDMA/EDGE Mobile Phones with Inductorless Front-End in 65nm CMOS
Bernard Tenbroek1, Jon Strange1, Walid Ali-Ahmad2 1 3 MediaTek, West Malling, United Kingdom, 2MediaTek, Singapore, Singapore, MediaTek, Cambridge, United Kingdom The spectrum allocated for the operation of cellular serv
ISSCC 2011
Session 21
RF & Wireless
A 65nm CMOS SoC with Embedded HSDPA/EDGE
Alberto Cicalini1, Sankaran Aniruddhan1, Rahul Apte2, Frederic Bossu1, Ojas Choksi1, Dan Filipovic1, Kunal Godbole1, Tsai-Pi Hung1, Christos Komninakis1, David Maldonado1, Chiewcharn Narathong1, Babak Nejati1, Deirdre O’
ISSCC 2011
Session 21
RF & Wireless
A 9-Band WCDMA/EDGE Transceiver Supporting HSPA Evolution
Torkel Arnborg1, Peter Caputa1, Staffan Ek2, Lin Fan1, Henrik Fredriksson1, Fabien Garrigues3, Henrik Geis1, Hans Hagberg1, Joel Hedestig1, Hu Huang3, Yevgeniy Kagan3, Niklas Karlsson1, Henrik Kinzel1, Thomas Mattsson1,
ISSCC 2011
Session 21
RF & Wireless
A SAW-less GSM/GPRS/EDGE Receiver Embedded in a 65nm CMOS SoC
integration and reducing bill of material (BOM) for GSM/GPRS/EDGE cellular systems. In modern cellular phones, transmit SAW filters have been largely eliminated with innovative TX architecture and circuits [1] while rece
ISSCC 2010
Session 3
RF & Wireless
A Low-Power Low-Noise Direct-Conversion FrontEnd with Digitally Assisted IIP2 Background Self Calibration
Columbia University, New York, NY Toshiba, Kawasaki, Japan 2 Direct conversion receivers offer a high level of integration for multiband applications. For standards operating in full duplex, like WCDMA, a very high IIP2
ISSCC 2010
Session 3
RF & Wireless
A 23mW Fully Integrated GPS Receiver with Robust Interferer Rejection in 65nm CMOS
are rapidly increasing in importance in our life. In particular, smart-phones with embedded GPS receivers are still growing their share and soon they will be the main products in the handset market. Co-existence of a GPS
ISSCC 2010
Session 3
RF & Wireless
A 10MHz Signal Bandwidth Cartesian-Loop Transmitter Capable of Off-Chip PA Linearization
Recently, signals with high peak-to-average power ratio (PAPR) are being used for metropolitan area networks (MANs) and cellular systems, and therefore highly linear transmitters (Txs) are required. The linearity perform
ISSCC 2010
Session 3
RF & Wireless
A 900MHz Direct ΔΣ Receiver in 65nm CMOS
Nokia Research Center, currently with ST-Ericsson, Turku, Finland, Nokia Research Center, Otaniemi Lablet, Espoo, Finland 2 Wireless communications is moving towards higher data rates but also requiring dynamic scalabili
ISSCC 2010
Session 3
RF & Wireless
A 45nm WCDMA Transmitter Using Direct Quadrature Voltage Modulator with High Oversampling Digital Front-End
In FDD systems such as WCDMA and LTE, simultaneous TX and RX operation poses a stringent TX noise floor requirement at the RX band. To eliminate the SAW filter between the TX and the PA without desensitizing the RX in WC
ISSCC 2010
Session 3
RF & Wireless
A Tri-Band SAW-Less WCDMA/HSPA RF CMOS Transceiver with On-Chip DC-DC Converter Connectable to Battery
Thomas Burger2, Thomas Christen1, Dimitris Papadopoulos1,4, Ilian Kouchev1, Chiara Martelli1,2, Thomas Dellsperger1 1 Advanced Circuit Pursuit, Zollikon, Switzerland ETH Zürich, Zürich, Switzerland, 3 now with Marvell Se
ISSCC 2010
Session 3
RF & Wireless
A 0.8mm2 All-Digital SAW-Less Polar Transmitter in 65nm EDGE SoC
Khurram Waheed1, Mitch Entezari1, Gennady Feygin1, Sudheer Vemulapalli1, Vasile Zoicas1, Chih-Ming Hung1, Nathen Barton1, Imran Bashir1, Kenneth Maggio1, Michel Frechette1, Meng-Chang Lee1, John Wallberg1, Patrick Cruise
ISSCC 2010
Session 3
RF & Wireless
A Quad-Band Class-39 RF CMOS Receiver for Evolved EDGE
polarize between high-end smart phones and ultra-low-cost devices, with the former providing the only growth sector during the downturn recently. A key enabler for the popular smart phones, netbooks and other mobile broa
ISSCC 2010
Session 27
RF & Wireless
Ultra-Low-Voltage Circuits for Sensor Applications Powered by Free-Space Optics
University of California, Davis, CA Cisco Systems, Davis, CA 3 Agilent Technology, Santa Clara, CA 2 Advances in photonics have typically been exploited in high performance systems, e.g. high-frequency, low-jitter clocks
ISSCC 2010
Session 27
RF & Wireless
An 8.6GHz 42ps Pulse-Width Electrical Mode-Locked Oscillator
This paper reports on a fully integrated electrical mode-locked oscillator. Modelocked oscillators are traveling wave oscillators that excite multiple spectral modes of a transmission line resonator and lock them in phas
ISSCC 2010
Session 27
RF & Wireless
A 5.4dBm 42mW 2.4GHz CMOS BAW-Based QuasiDirect Conversion Transmitter
The trend of low-data rate wireless sensor networks (WSN) to interface at higher data rate with other devices or networks using standard protocols such as Bluetooth Low Energy and ZigBee, calls for a flexible RF system a
ISSCC 2010
Session 27
RF & Wireless
A 110µW 10Mb/s eTextiles Transceiver for Body Area Networks with Remote Battery Power
Emerging sensor technologies are enabling low-cost ambulatory medical devices for remote patient monitoring. In order to replace traditional bulky wired links used to communicate data around and away from the body, recen
ISSCC 2010
Session 27
RF & Wireless
A Single-Inductor AC-DC Piezoelectric EnergyHarvester/Battery-Charger IC Converting ±(0.35 to 1.2V) to (2.7 to 4.5V)
Microscale integration constrains energy and the lifetime microsystems like wireless sensors and biomedical implants can achieve to impractical levels. Harnessing ambient vibration energy from a small piezoelectric trans
ISSCC 2010
Session 27
RF & Wireless
A Multichannel DNA SoC for Rapid Point-of-Care Gene Detection
Samuel Reed, Leila M Shepherd, Winston Wong Jr, K.T. Lim, Christofer Toumazou DNA Electronics, London, United Kingdom Point-of-care diagnostics for detection of genetic sequences require biosensing platforms that are sen
ISSCC 2010
Session 27
RF & Wireless
A 3.9mW 25-Electrode Reconfigured Thoracic Impedance/ECG SoC with Body-Channel Transponder
cardiovascular-related disease [1] with wearable body sensor network (WBSN) [2-3]. The WBSN introduced in [3] monitored ECG at maximum 48 points, and transferred data using arrayed inductive link for cm-range wireless in
ISSCC 2010
Session 27
RF & Wireless
Palm NMR and One-Chip NMR 1 2 2 1
Cambridge, MA, T2 Biosystems, Cambridge, MA 2 3 Nuclear magnetic resonance, or NMR, is the energy exchange between an RF magnetic field and an atomic nucleus such as a hydrogen proton, which is a tiny bar magnet due to i
ISSCC 2010
Session 27
RF & Wireless
Nano-Watt Power Management and Vibration Sensing on a Dust-Size Batteryless Sensor Node for Ambient Intelligence Applications
preventing the realization of dust-size battery-less sensor nodes are reported. Sensor networks deploying large numbers of nodes are anticipated for “ambient intelligence” [1]. For such networks, the sensor nodes should
ISSCC 2010
Session 27
RF & Wireless
A Batteryless Thermoelectric Energy-Harvesting Interface Circuit with 35mV Startup Voltage
Energy harvesting is an emerging technology with applications to handheld, portable and implantable electronics. Harvesting ambient heat energy using thermoelectric generators (TEG’s) [1] is a convenient means to supply
ISSCC 2010
Session 20
RF & Wireless
A 2×25Gb/s Deserializer with 2:5 DMUX for 100Gb/s Ethernet Applications
The ever growing bandwidth requirement for novel server technologies including multi-core processing, virtualization, and networked storage leads to multichannel Internet connectivity such as 100GbE. Among the proposed s