JSSC 2024第9期MemoryFlash MemoryEmerging Memory
提出智能写入算法提升RRAM宏的性能与可靠性
JSSC 2023第1期Wireline I/OFlash Memory
A 1-Tb 4-b/cell 4-Plane 162-Layer 3-D Flash Memory With 2.4-Gb/s IO Interface Jong Hak Y uh , Y en-Lung Jason Li, Heguang Li, Y oshihiro Oyama, Cynthia Hsu, Pradeep Anantula, Gwang Y eong Stanley Jeong, Anirudh Amarnath, Siddhesh Darne, Sneha Bhatia, Tianyu Tang, Aditya Arya, Naman Rastogi, Naoki Ookuma, Hiroyuki Mizukoshi, Alex Y ap, Demin Wang, Steve Kim, Y onggang Wu, Min Peng, Jason Lu, Tommy Ip, Seema Malhotra, Taekeun Han, Masatoshi Okumura, Jiwen Liu , Jeongduk John Sohn, Hardwell Chibvongodze, Muralikrishna Balaga, Akihiro Matsuda, Chen Chen , Indra K. V ., V . S. N. K. Chaitanya G., V enky Ramachandra, Y osuke Kato, Ravi J. Kumar, Huijuan Wang, Farookh Moogat, In-Soo Y oon, Kazushige Kanda, Takahiro Shimizu, Noboru Shibata, Kosuke Y anagidaira, Takuyo Kodama, Ryo Fukuda 1Tb 4位/单元162层3D闪存，采用中央阶梯结构和CTW架构，实现15Gb/mm²面密度和60MB/s编程吞吐量。
JSSC 2022第2期MemoryFlash MemoryCIM
在65nm CMOS工艺中实验验证了基于嵌入式NAND闪存的存内计算阵列神经网络硬件。
JSSC 2021第1期MemoryFlash Memory
A 128Gb 1-bit/Cell 96-Word-Line-Layer 3D Flash Memory to Improve the Random Read Latency With tProg = 75 µsa n dt R = 4 µs Toshiyuki Kouchi , Mami Kakoi, Noriyasu Kumazaki, Akio Sugahara, Akihiro Imamoto, Y asufumi Kajiyama, Y uri Terada, Bushnaq Sanad, Naoaki Kanagawa, Takuyo Kodama, Ryo Fukuda, Hiromitsu Komai, Norichika Asaoka, Hidekazu Ohnishi, Ryosuke Isomura, Takaya Handa, Kensuke Y amamoto , Y uki Ishizaki, Y oko Deguchi, Atsushi Okuyama, Junichi Sato, Hiroki Y abe, Hua-Ling Cynthia Hsu, and Masahiro Y oshihara 一款采用96层字线技术的128Gb 1-bit/cell 3D闪存芯片，通过创新架构和编程序列提升读取速度和可靠性。
JSSC 2021第4期Wireline I/OFlash Memory
A 1.8-Gb/s/Pin 16-Tb NAND Flash Memory Multi-Chip Package With F-Chip for High-Performance and High-Capacity Storage Daehoon Na , Jang-woo Lee, Seon-Kyoo Lee, Hwasuk Cho, Junha Lee, Manjae Y ang, Eunjin Song, Anil Kavala, Tongsung Kim, Dong-Su Jang, Y oungmin Jo, Ji-Y eon Shin, Byung-Kwan Chun, Tae-sung Lee, Byunghoon Jeong, Chi-Weon Y oon, Dongku Kang, Seungjae Lee, Jungdon Ihm, Dae Seok Byeon, Jinyub Lee, and Jai 本文提出了一种1.2V、1.8Gb/s/pin的16Tb NAND闪存多芯片封装方案，采用第三代F-chip提升性能。
JSSC 2020第1期MemoryFlash Memory
A 1.33-Tb 4-Bit/Cell 3-D Flash Memory on a 96-Word-Line-Layer Technology Noboru Shibata , Kazushige Kanda, Takahiro Shimizu, Jun Nakai, Osamu Nagao, Naoki Kobayashi, Makoto Miakashi , Y asushi Nagadomi, Tomoaki Nakano, Takahisa Kawabe, Taira Shibuya, Mario Sako, Kosuke Y anagidaira, Toshifumi Hashimoto, Hiroki Date, Manabu Sato, Tomoki Nakagawa, Junji Musha, Takatoshi Minamoto, Mizuki Uda, Dai Nakamura, Katsuaki Sakurai, Takahiro Y amashita, Jieyun Zhou, Ryoichi Tachibana, Teruo Takagiwa, Takahiro Sugimoto, Masatsugu Ogawa, Y usuke Ochi, Kazuaki Kawaguchi, Masatsugu Kojima, Takeshi Ogawa, Tomoharu Hashiguchi, Ryo Fukuda, Masami Masuda, Koichi Kawakami, Tadashi Someya, Y asuyuki Kajitani, Y uuki Matsumoto, Jumpei Sato, Namasivayam Raghunathan, Y ee Lih Koh, Shuo Chen, Juan Lee, Hiroaki Nasu, Hiroshi Sugawara, Koji Hosono, Toshiki Hisada, and 一款具有133-Tb容量、4位元存储单元的3D闪存，采用96层字线技术，实现8.5 Gb/mm²的高密度存储。
JSSC 2020第10期OtherFlash Memory
提出一种隐私保护的NAND闪存系统，灵活控制数据生命周期。
JSSC 2019第6期Digital CircuitsFlash Memory
提出一种无需ECC的Value-Aware SSD，通过DNN图像识别的容错性提升可靠性。
JSSC 2017第1期MemoryFlash Memory
256GB 3位单元V-NAND闪存，采用48层堆叠WL技术
JSSC 2016第1期MemoryFlash Memory
该论文介绍了一种128Gb 3b单元V-NAND闪存，支持1Gb/s的IO速率。
JSSC 2016第1期MemoryFlash Memory
15纳米CMOS工艺下的低功耗64Gb MLC NAND闪存
JSSC 2015第1期MemoryFlash Memory
Three-Dimensional 128 Gb MLC V ertical NAND Flash Memory With 24-WL Stacked Layers and 50 MB/s High-Speed Programming Ki-Tae Park, Sangwan Nam, Daehan Kim, Pansuk Kwa k, Doosub Lee, Y oon-He Choi, Myung-Hoon Choi, Dong-Hun Kwak, Doo-Hyun Kim, Min-Su Kim, Hyun-Wook Park, Sang-Won Shim, Kyung-Min Kang, Sang-Won Park, Kangbin Lee, Hyun-Jun Y oon, Kuihan Ko, Dong-Kyo Shim, Y ang-Lo Ahn, Jinho Ryu, Donghyun Kim, Kyunghwa Y un, Joonsoo Kwon, Seunghoon Shin, Dae-Seok Byeon, Kihwan Choi, Student Member , IEEE, Jin-Man Han, Kye-Hyun Kyung, Jeong-Hyuk Choi, and 首次实现128Gb 3D垂直NAND闪存，采用环绕栅极结构和屏障工程材料，优化编程分布与功耗。
JSSC 2015第6期MemoryFlash Memory
该论文提出了三种电路级技术来解决3D垂直栅极NAND闪存的跨层工艺变异问题。
JSSC 2013第1期MemoryFlash Memory
A1 9n m1 1 2 . 8m m 64 Gb Multi-Level Flash Memory With 400 Mbit/sec/pin 1.8 V Toggle Mode Interface Kazushige Kanda, Noboru Shibata, Toshiki Hisa da, Katsuaki Isobe, Manabu Sato, Y ui Shimizu, Takahiro Shimizu, Takahiro Sugimoto, Tomohiro K obayashi, Naoaki Kanagawa, Y asuyuki Kajitani, Takeshi Ogawa, Kiyoaki Iwasa, Masatsugu Kojima, Toshihiro Suzuki, Y uya Suzuki, Shintaro Sakai, Tomofumi Fujimura, Y uko Utsunomiya, Toshifumi H ashimoto, Naoki Kobayashi, Y uuki Matsumoto, Satoshi Inoue, Y oshinao Suzuki, Y asuhiko Honda, Y osuke Kato, Shingo Zaitsu, Hardwell Chibvongodze, Mitsuyuki Watanabe, Hong Ding, Naoki Ookuma, and Ryuji Y amashita 19nm CMOS工艺下64Gb MLC NAND闪存，采用单边全位线架构，实现高性能编程吞吐量。
JSSC 2013第4期OtherFlash Memory
Adaptive Multi-Pulse Program Scheme Based on Tunneling Speed Classi fication for Next Generation Multi-Bit/Cell NAND FLASH Y ong Sung Cho, Il Han Park, Sang Y ong Y oon, Nam Hee Lee, Sang Hyun Joo, Ki-Whan Song, Kihwan Choi, Student Member , IEEE, Jin-Man Han, Kye 提出一种基于隧穿速度分类的自适应多脉冲编程方案，用于提升NAND闪存的编程性能。
JSSC 2013第5期MemoryFlash Memory
一种基于标准逻辑工艺的嵌入式闪存，用于零待机功耗SoC
JSSC 2013第6期RF & WirelessFlash Memory
提出一种用于低成本RFID非易失性存储器的低功耗GIDL-Free电压驱动器设计。
JSSC 2013第10期Wireline I/OFlash Memory
A 2.74-pJ/bit, 17.7-Gb/s Iterative Concatenated-BCH Decoder in 65-nm CMOS for NAND Flash Memory Y oungjoo Lee, Student Member , IEEE, Hoyoung Y oo, Student Member , IEEE,J a ehwan Jung, Student Member , IEEE, Jihyuck Jo, Student Member , IEEE 65nm CMOS工艺下高效能迭代级联BCH解码器，用于NAND闪存纠错。
JSSC 2012第1期MemoryFlash Memory
A 151-mm/5064-Gb 2 Bit/Cell NAND Flash Memory in 24-nm CMOS Technology Koichi Fukuda, Y oshihisa Watanabe, Eiichi Makino, Koichi Kawakami, Jumpei Sato, Teruo Takagiwa, Naoaki Kanagawa, Hitoshi Shiga, Naoya Tokiwa, Y oshihiko Shindo, Takeshi Ogawa, Toshiaki Edahiro, Makoto Iwai, Osamu Nagao, Junji Musha, Takatoshi Minamoto, Y uka Furuta, Kosuke Y anagidaira, Y uya Suzuki, Dai Nakamura, Y oshikazu Hosomura, Rieko Tanaka, Hiromitsu Komai, Mai Muramoto, Go Shikata, Ayako Y uminaka, Kiyofumi Sakurai, Manabu Sakai, Hong Ding, Mitsuyuki Watanabe, Y osuke Kato, Toru Miwa, Alexander Mak, Masaru Nakamichi, Gertjan Hemink, Dana Lee, Masaaki Higashitani, Brian Murphy, Bo Lei, Y asuhiko Matsunaga, Kiyomi Naruke, and 24纳米CMOS工艺下实现64Gb 2位单元NAND闪存，具有高密度和高性能。
JSSC 2012第4期MemoryFlash Memory
A 21 nm High Performance 64 Gb MLC NAND Flash Memory With 400 MB/s Asynchronous Toggle DDR Interface Chulbum Kim, Jinho Ryu, Taesung Lee, Hyunggon Kim, Jaewoo Lim, Jaeyong Jeong, Seonghwan Seo, Hongsoo Jeon, Bokeun Kim, Inyoul Lee, Dooseop Lee, Pansuk Kwak, Seongsoon Cho, Y ongsik Yim, Changhyun Cho, Woopyo Jeong, Kwangil Park, Jin-Man Han, Duheon Song 21纳米工艺64Gb MLC NAND闪存，支持400MB/s异步DDR接口。
JSSC 2011第1期MemoryFlash Memory
A 32-Gb MLC NAND Flash Memory With Vth Endurance Enhancing Schemes in 32 nm CMOS Changhyuk Lee, Sok-Kyu Lee, Sunghoon Ahn, Jinhaeng Lee, Wonsun Park, Y ongdeok Cho, Chaekyu Jang, Chulwoo Y ang, Sanghwa Chung, In-Suk Y un, Byoungin Joo, Byoungkwan Jeong, Jeeyul Kim, Jeakwan Kwon, Hyunjong Jin, Y ujong Noh, Jooyun Ha, Moonsoo Sung, Daeil Choi, Sanghwan Kim, Jeawon Choi, Taeho Jeon, Heejoung Park, Joong-Seob Y ang, and Y o-Hwan Koh 32nm CMOS工艺下32Gb MLC NAND闪存，采用新型编程和读取方案提升阈值电压耐久性。
JSSC 2011第6期Power ManagementBoost ConverterFlash Memory
基于升压转换器的18V低瞬态能量自适应编程电压发生器，用于3D集成SSD。
JSSC 2010第1期RF & WirelessFlash Memory
提出一种用于NAND闪存堆栈的2Gbps 15pJ/bit电感耦合可编程总线，显著降低SSD功耗和面积。
JSSC 2010第10期MemoryFlash Memory
本文提出了一种动态Vpass控制方案和优化的擦除阈值控制，以提高40nm以下MLC NAND闪存的编程抑制和降低编程干扰。
JSSC 2010第10期MemoryFlash Memory
提出一种采用批量写入算法和非易失性页缓冲器的铁电NAND闪存，以提升企业级SSD的随机写入性能。
JSSC 2009第1期MemoryFlash Memory
A 16 Gb 3-Bit Per Cell (X3) NAND Flash Memory on 56 nm Technology With 8 MB/s Write Rate Y an Li, Seungpil Lee, Y upin Fong, Feng Pan, Tien-Chien Kuo, Jongmin Park, Tapan Samaddar, Hao Thai Nguyen, Man L. Mui, Khin Htoo, Teruhiko Kamei, Masaaki Higashitani, Emilio Y ero, Gyuwan Kwon, Phil Kliza, Jun Wan, Tetsuya Kaneko, Hiroshi Maejima, Hitoshi Shiga, Makoto Hamada, Norihiro Fujita, Kazunori Kanebako, Eugene Tam, Anne Koh, Iris Lu, Calvin Chia-Hong Kuo, Trung Pham, Jonathan Huynh, Qui Nguyen, Hardwell Chibvongodze, Mitsuyuki Watanabe, Ken Oowada, Grishma Shah, Byungki Woo, Ray Gao, James Chan, James Lan, Patrick Hong, Liping Peng, Debi Das, Dhritiman Ghosh, Vivek Kalluru, Sanjay Kulkarni, Raul-Adrian Cernea, Sharon Huynh 首次报道采用56nm CMOS技术的16Gb 3位每单元NAND闪存芯片，写入性能达8MB/s。
JSSC 2009第1期MemoryFlash Memory
A Fully Performance Compatible 45 nm 4-Gigabit Three Dimensional Double-Stacked Multi-Level NAND Flash Memory With Shared Bit-Line Structure Ki-Tae Park, Myounggon Kang, Soonwook Hwang, Doogon Kim, Hoosung Cho, Y oungwook Jeong, Y ong-Il Seo, Jaehoon Jang, Han-Soo Kim, Y eong-Taek Lee, Soon-Moon Jung 45纳米三维双层堆叠4Gb多级单元NAND闪存，采用共享位线结构和硅层专用解码器技术
JSSC 2009第3期MemoryFlash Memory
提出一种预稳定电流传感技术（PSCS），用于减少嵌入式闪存访问时间和传感裕度的波动。
JSSC 2009第4期MemoryFlash Memory
通过NAND闪存与控制器的协同设计，实现低功耗高速SSD
JSSC 2008第2期Power ManagementCharge PumpFlash Memory
High-V oltage Analog System for a Mobile NAND Flash Yong Hoon Kang, Jin-Kook Kim, Sang Won Hwang, Joon Young Kwak, Jun-Yong Park, Daeyong Kim, Chan Ho Kim, Jong Yeol Park, Yong-Taek Jeong, Jong Nam Baek, Su Chang Jeon, Pyungmoon Jang, Sang Hoon Lee, You-Sang Lee, Min-Seok Kim, Jin-Yub Lee, and Yun 提出一种适用于移动设备NAND闪存的高电压模拟系统，重点优化低电压、低功耗和小面积设计。
JSSC 2008第4期OtherFlash Memory
提出一种新型MLC NAND页架构，通过临时LSB存储和并行MSB编程减少单元间干扰。
JSSC 2007第1期MemoryFlash Memory
56纳米CMOS工艺的8Gb NAND闪存，实现10MB/s编程速度和98.8mm²芯片面积
JSSC 2007第6期MemoryFlash Memory
首次观察到闪存中随机电报信号引起的阈值电压波动，并发现其在45nm节点后将成为多级闪存设计的重要问题。
JSSC 2006第1期MemoryFlash Memory
A 146-mm/508-Gb Multi-Level NAND Flash Memory With 70-nm CMOS Technology Takahiko Hara, Koichi Fukuda, Kazuhisa Kanazawa, Noboru Shibata, Koji Hosono, Hiroshi Maejima, Michio Nakagawa, Takumi Abe, Masatsugu Kojima, Masaki Fujiu, Yoshiaki Takeuchi, Kazumi Amemiya, Midori Morooka, Teruhiko Kamei, Hiroaki Nasu, Chi-Ming Wang, Kiyofumi Sakurai, Naoya Tokiwa, Hiroko Waki, Tohru Maruyama, Susumu Yoshikawa, Masaaki Higashitani, Tuan D. Pham, Yupin Fong, and 采用70nm CMOS技术开发的多级NAND闪存，芯片面积减小4.9%，编程吞吐量达6MB/s。
JSSC 2006第11期MemoryFlash Memory
介绍了一种采用130nm CMOS工艺的1.8V 256Mb四层单元NOR闪存，具备后台操作功能。