全部论文

Papers 2008–2026

共 3875 篇 ISSCC 论文,按年份倒序排列

ISSCC 2018 Session 4 mm-Wave
A 64GHz Full-Duplex Transceiver Front-End with an On-Chip Multifeed Self-Interference-Canceling Antenna and an All-Passive Canceler Supporting 4Gb/s Modulation in One Antenna Footprint
Taiyun Chi, Jong Seok Park, Sensen Li, Hua Wang
Millimeter-wave full-duplex (FD) transceivers (TRXs) have the potential to unlock the full throughput of future 5G links. A major challenge in mm-wave FD TRXs is to suppress the wideband modulated self-interference (SI)
ISSCC 2018 Session 4 mm-Wave
A Fully Integrated Scalable W-Band Phased-Array
Module with Integrated Antennas, Self-Alignment and, Self-Test
SiGe BiCMOS and CMOS processes continue to push the frontier on millimeter-wave (mm-wave) and highly integrated phased-array systems for a variety of communication applications [1,3]. Furthermore, next-generation mobile
ISSCC 2018 Session 4 mm-Wave
A Reconfigurable 28/37GHz Hybrid-Beamforming MIMO Receiver with Inter-Band Carrier Aggregation and RF-Domain LMS Weight Adaptation
Susnata Mondal, Rahul Singh, Jeyanandh Paramesh
This paper presents a hybrid beamforming mm-wave MIMO receiver with two key innovations. First, it can be configured into three modes: two single-band multistream modes at 28 or 37 GHz that can support single- or multi-u
ISSCC 2018 Session 4 mm-Wave
A 28GHz Bulk-CMOS Dual-Polarization Phased-Array Transceiver with 24 Channels for 5G User and Basestation Equipment
J. D. Dunworth1, A. Homayoun1, B-H. Ku1, Y-C. Ou1, K. Chakraborty1,
G. Liu1, T. Segoria1, J. Lerdworatawee1, J. W. Park1, H-C. Park2, H. Hedayati3, D. Lu1, P. Monat1, K. Douglas1, V. Aparin1 Qualcomm, San Diego, CA now with Samsung Electronics, Suwon, Korea 3 now with Atlazo, San Diego,
ISSCC 2018 Session 4 mm-Wave
A 23-to-30GHz Hybrid Beamforming MIMO Receiver Array with Closed-Loop Multistage Front-End Beamformers for Full-FoV Dynamic and Autonomous Unknown Signal Tracking and Blocker Rejection
Min-Yu Huang, Taiyun Chi, Fei Wang, Tso-Wei Li, Hua Wang
Millimeter-wave massive MIMOs leverage large array size to enhance the link budget and spatial selectivity, but their resulting narrow beamwidth substantially complicates the transmitter-receiver (TX-RX) alignment. Unlik
ISSCC 2018 Session 4 mm-Wave
A 60GHz 144-Element Phased-Array Transceiver with 51dBm Maximum EIRP and ±60° Beam Steering for Backhaul Application
Tirdad Sowlati, Saikat Sarkar, Bevin Perumana, Wei Liat Chan,
Bagher Afshar, Michael Boers, Donghyup Shin, Timothy Mercer, Wei-Hong Chen, Anna Papio Toda, Alfred Grau Besoli, Seunghwan Yoon, Sissy Kyriazidou, Phil Yang, Vipin Aggarwal, Nooshin Vakilian, Dmitriy Rozenblit, Masoud Ka
ISSCC 2018 Session 31 AI / ML
A 65nm 4Kb Algorithm-Dependent Computing-inMemory SRAM Unit-Macro with 2.3ns and 55.8TOPS/W Fully Parallel Product-Sum Operation for Binary DNN Edge Processors
Win-San Khwa1,2, Jia-Jing Chen1, Jia-Fang Li1, Xin Si3, En-Yu Yang1,
Technology of China, Sichuan, China 4 Arizona State University, Tempe, AZ 1 3 For deep-neural-network (DNN) processors [1-4], the product-sum (PS) operation predominates the computational workload for both convolution (C
ISSCC 2018 Session 31 AI / ML
A 65nm 1Mb Nonvolatile Computing-in-Memory ReRAM Macro with Sub-16ns Multiply-andAccumulate for Binary DNN AI Edge Processors
Wei-Hao Chen, Kai-Xiang Li, Wei-Yu Lin, Kuo-Hsiang Hsu, Pin-Yi Li,
Cheng-Han Yang, Cheng-Xin Xue, En-Yu Yang, Yen-Kai Chen, Yun-Sheng Chang, Tzu-Hsiang Hsu, Ya-Chin King, Chorng-Jung Lin, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang National Tsing Hua University, Hsinc
ISSCC 2018 Session 31 AI / ML
Brain-Inspired Computing Exploiting Carbon Nanotube FETs and Resistive RAM: Hyperdimensional Computing Case Study
Tony F. Wu1, Haitong Li1, Ping-Chen Huang2, Abbas Rahimi2,
Jan M. Rabaey2, H.-S. Philip Wong1, Max M. Shulaker3, Subhasish Mitra1 Stanford University, Stanford, CA University of California, Berkeley, Berkeley, CA 3 Massachusetts Institute of Technology, Cambridge, MA 1 2 We demo
ISSCC 2018 Session 31 AI / ML
A 42pJ/Decision 3.12TOPS/W Robust In-Memory Machine Learning Classifier with On-Chip Training
Sujan Kumar Gonugondla, Mingu Kang, Naresh Shanbhag
Embedded sensory systems (Fig. 31.2.1) continuously acquire and process data for inference and decision-making purposes under stringent energy constraints. These always-ON systems need to track changing data statistics a
ISSCC 2018 Session 31 AI / ML
Conv-RAM: An Energy-Efficient SRAM with Embedded Convolution Computation for Low-Power CNN-Based Machine Learning Applications
Avishek Biswas, Anantha P. Chandrakasan, charge-sharing is used to integrate the lower of the 2 voltage rails with a ref
local column that replicates the local bit-line capacitance. This process continues until the voltage of the rail being integrated exceeds the other one, at which point the SA output flips. This signals conversion comple
ISSCC 2018 Session 30 Other
A 20ns-Write 45ns-Read and 1014-Cycle Endurance Memory Module Composed of 60nm Crystalline Oxide Semiconductor Transistors
Shuhei Maeda1, Satoru Ohshita1, Kazuma Furutani1, Yuto Yakubo1,
Takahiko Ishizu1, Tomoaki Atsumi1, Yoshinori Ando1, Daisuke Matsubayashi1, Kiyoshi Kato1, Takashi Okuda1, Masahiro Fujita2, Shunpei Yamazaki1 Semiconductor Energy Laboratory, Atsugi, Japan 2 University of Tokyo, Tokyo, J
ISSCC 2018 Session 30 Other
A 28nm 32Kb Embedded 2T2MTJ STT-MRAM Macro with 1.3ns Read-Access Time for Fast and Reliable Read Applications
Tzu-Hsien Yang1,2, Kai-Xiang Li1, Yen-Ning Chiang1, Wei-Yu Lin1,
nonvolatile memory (NVM) with a fast read-access time (TAC) and reliable read operations: for applications including data-logging, configurable look-up tables (LUT), eFuse, and physically unclonable functions (PUF). STT-
ISSCC 2018 Session 30 Other
A 1Mb 28nm STT-MRAM with 2.8ns Read Access Time at 1.2V VDD Using Single-Cap Offset-Cancelled Sense Amplifier and In-situ Self-Write-Termination
Qing Dong1,2, Zhehong Wang1, Jongyup Lim1, Yiqun Zhang1,
spin-transfer-torque (STT) MRAM is a promising candidate for nextgeneration high-density embedded non-volatile memory [1-2]. However, 1T1R STT-MRAM suffers from limited sensing margin and high write power. As shown in Fi
ISSCC 2018 Session 30 Other
An N40 256K×44 Embedded RRAM Macro with SL-Precharge SA and Low-Voltage Current Limiter to Improve Read and Write Performance
Chung-Cheng Chou, Zheng-Jun Lin, Pei-Ling Tseng, Chih-Feng Li,
due to the simplicity of the RRAM element (RE) and its compatibility with a logic process. A RRAM bit cell (Fig. 30.1.1) consists of an NMOS select transistor and a bipolar RE, which consists of a bottom electrode (BE),
ISSCC 2018 Session 3 Analog Circuits
A Low-Power 3.25GS/s 4th-Order Programmable Analog FIR Filter Using Split-CDAC Coefficient Multipliers for Wideband Analog Signal Processing
Shinwoong Park1, Dongseok Shin2, Kwang-Jin Koh1, Sanjay Raman1
Discrete-time (DT) circuits provide a means to overcome the analog-circuit design challenges in deeply scaled digital CMOS technologies while benefitting from the reduced switch on-resistance and parasitic capacitance, r
ISSCC 2018 Session 3 Analog Circuits
A 0.96mA Quiescent Current, 0.0032% THD+N, 1.45W Class-D Audio Amplifier with Area-Efficient PWMResidual-Aliasing Reduction
Shih-Hsiung Chien, Yi-Wen Chen, Tai-Haur Kuo
Low quiescent current (IQ) is critical for Class-D audio amplifiers in mobile devices to extend battery usage time [1], since typical audio signals have a high crest factor of 10 to 20dB. In addition, low distortion is a
ISSCC 2018 Session 3 Analog Circuits
A 0.0004% (-108dB) THD+N, 112dB-SNR, 3.15W Fully Differential Class-D Audio Amplifier with Gm Noise Cancellation and Negative Output-Common-Mode Injection Techniques
Wen-Chieh Wang, Yu-Hsin Lin, MediaTek, Hsinchu, Taiwan, Flicker (1/f) noise is a main design issue when realizing a low-
techniques are commonly adopted approaches to mitigate 1/f noise. However, the choppers are seldom used in pulse-width-modulation (PWM) Class-D audio amplifiers (CDAs) because the conventional chopping method applied in
ISSCC 2018 Session 3 Analog Circuits
A 2×20W 0.0013% THD+N Class-D Audio Amplifier with Consistent Performance up to Maximum Power Level
Eric Cope, Julian Aschieri, Tony Lai, Franklin Zhao, Walter Grandfield,
Michael Clifford, Pete Rathfelder, Qiyuan Liu, Siddartha Kavilipati, Aaron Vandergriff, Gerald Miaille Qualcomm, Tempe, AZ Conventional Class-D amplifiers, although more power efficient than Class-AB amplifiers, typicall
ISSCC 2018 Session 3 Analog Circuits
A CMOS Dual-RC Frequency Reference with ±250ppm Inaccuracy from -45°C to 85°C
Çağrı Gürleyük, Lorenzo Pedalà, Fabio Sebastiano, Kofi A. A. Makinwa
To comply with wired communication standards such as USB, SATA and PCI/PCIE, systems-on-chip require frequency references with better than 300ppm accuracy. LC-based references achieve 100ppm accuracy [1], but suffer from
ISSCC 2018 Session 3 Analog Circuits
A Regulation-Free Sub-0.5V 16/24MHz Crystal Oscillator for Energy-Harvesting BLE Radios with 14.2nJ Startup Energy and 31.8µW Steady-State Power
Ka-Meng Lei1, Pui-In Mak1, Man-Kay Law1, Rui P. Martins1,2
Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 This paper reports a regulation-free sub-0.5V crystal oscillator (XO) for Bluetooth Low-Energy (BLE) radios [1] that can be self-powered by harvesting
ISSCC 2018 Session 3 Analog Circuits
A Quiet Digitally Assisted Auto-Zero-Stabilized Voltage Buffer with 0.6pA Input Current and 0.6µV Offset
Thije Rooijers, Johan H. Huijsing, Kofi A. A. Makinwa
The readout of high impedance sensors and sampled voltage references [1] requires amplifiers with both low offset and low input current. Chopper amplifiers can achieve low offset, but the switching of their input chopper
ISSCC 2018 Session 29 Medical & Bio
A 43.4μW Photoplethysmogram-Based Heart-Rate Sensor Using Heart-Beat-Locked Loop
Do-Hun Jang, SeongHwan Cho
Photoplethysmogram (PPG) sensors have gained great popularity in recent years as they can easily obtain heart rate (HR) in wearable devices such as smart watches and smart rings. However, one of the biggest problems for
ISSCC 2018 Session 29 Medical & Bio
A 110dB-CMRR 100dB-PSRR Multi-Channel NeuralRecording Amplifier System Using Differentially Regulated Rejection Ratio Enhancement in 0.18μm CMOS
Sehwan Lee1, Arup K. George1, Taeju Lee2, Jun-Uk Chu3, Sungmin Han4,
Korea 4 Korea Institute of Science and Technology, Seoul, Korea 5 Seoul National University of Science and Technology, Seoul, Korea rails of the amplifier stack, VDD_LNA, VMID and VSS_LNA also tracks VCM, effectively sup
ISSCC 2018 Session 29 Medical & Bio
A 92dB Dynamic Range Sub-μVrms-Noise 0.8μW/ch Neural-Recording ADC Array with Predictive Digital Autoranging
Chul Kim, Siddharth Joshi, Hristos Courellis, Jun Wang, Cory Miller, Gert Cauwenberghs
center left). A two-stage comparator (Fig. 29.6.2 top right) performs 1b quantization. Decision time ranges from 1.5 to 2μs depending on input amplitude, dominated by capacitive loading (CT = 20fF) of the first-stage cur
ISSCC 2018 Session 29 Medical & Bio
A mm-Sized Free-Floating Wirelessly Powered Implantable Optical Stimulating System-on-a-Chip
Yaoyao Jia1, S. Abdollah Mirbozorgi1, Byunghun Lee1, Wasif Khan2,
cell-type specificity, high spatiotemporal precision, and reversibility, optogenetic neuromodulation has been widely utilized in brain mapping, visual prostheses, psychological disorders, Parkinson's disease, epilepsy, a
ISSCC 2018 Session 29 Medical & Bio
A 0.13μm CMOS SoC for Simultaneous Multichannel Optogenetics and Electrophysiological Brain Recording
Gabriel Gagnon-Turcotte, Christian Ethier, Yves De Koninck, Benoit Gosselin
approaches in neuroscience to observe neural microcircuits in vivo [1]. Thereby, brain-implantable devices incorporating optical stimulation and low-noise data acquisition means have been designed based on custom integra
ISSCC 2018 Session 29 Medical & Bio
A 16384-Electrode 1024-Channel Multimodal CMOS MEA for High-Throughput Intracellular Action Potential Measurements and Impedance Spectroscopy in Drug-Screening Applications
Carolina Mora Lopez1, Ho Sung Chun1, Laurent Berti2, Shiwei Wang1,
Jan Putzeys1, Carl Van Den Bulcke1,3, Jan-Willem Weijers1, Andrea Firrincieli1, Veerle Reumers1, Dries Braeken1, Nick Van Helleputte1 imec, Heverlee, Belgium Chrysalite, Tervuren, Belgium 3 KU Leuven, Leuven, Belgium 1 2
ISSCC 2018 Session 29 Medical & Bio
A Fully Immersible Deep-Brain Neural Probe with Modular Architecture and a Delta-Sigma ADC Integrated Under Each Electrode for Parallel Readout of 144 Recording Sites
Daniel De Dorigo1, Christian Moranz1, Hagen Graf1, Maximilian Marx1,
tissue-penetrating probes for high-density deep-brain recording of in vivo neural activity is limited by the level of electronic integration on the probe shaft. As the number of electrodes increases, conventional devices
ISSCC 2018 Session 29 Medical & Bio
Creating Neural “Co-processors” to Explore Treatments for Neurological Disorders
Scott Stanslaski1, Jeffrey Herron1, Elizabeth Fehrmann1, Rob Corey1,
Heather Orser1, Enrico Opri3, Vaclav Kremen2, Ben Brinkmann2, Aysegul Gunduz3, Kelly Foote3, Greg Worrell2, Tim Denison1 Medtronic Neurological Technology, Fridley, MN Mayo Clinic, Rochester, MN 3 University of Florida,
ISSCC 2018 Session 28 Wireless
A 5.8GHz Power-Harvesting 116μm×116μm ″Dielet″ Near-Field Radio with On-Chip Coil Antenna
Bo Zhao, Nai-Chung Kuo, Benyuanyi Liu, Yi-An Li, Lorenzo Iotti, Ali M. Niknejad
would benefit greatly from batteryless compact radios that require no external components. Such a radio could be used for future RFID, wearable/implantable devices, and counter-counterfeit electronics. Previous demonstra
ISSCC 2018 Session 28 Wireless
A 14.5mm2 8nW -59.7dBm-Sensitivity Ultrasonic
Wake-Up Receiver for Power-, Area-, and, Interference-Constrained Applications
unobtrusive, distributed mm-sized nodes capable of sensing and communicating information about their surroundings. Wake-up receivers (WuRXs) – ultra-low-power receivers that monitor their environment for a wake-up signat
ISSCC 2018 Session 28 Wireless
A -76dBm 7.4nW Wakeup Radio with Automatic Offset Compensation
Jesse Moody, Pouyan Bassirian, Abhishek Roy, Ningxi Liu,
Stephen Pancrazio, N. Scott Barker, Benton H. Calhoun, Steven M. Bowers University of Virginia, Charlottesville, VA Event-driven sensor nodes have applications in agriculture, infrastructure, and perimeter monitoring and
ISSCC 2018 Session 28 Wireless
A 0.2V Energy-Harvesting BLE Transmitter with a Micropower Manager Achieving 25% System Efficiency at 0dBm Output and 5.2nW Sleep Power in 28nm CMOS
Jun Yin1, Shiheng Yang1, Haidong Yi1, Wei-Han Yu1, Pui-In Mak1,
Rui P. Martins1,2 University of Macau, Macau, China Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 Massive deployment of wireless sensor tags (e.g. iBeacon) will only happen if batteries and their
ISSCC 2018 Session 28 Wireless
A 0.45V Sub-mW All-Digital PLL in 16nm FinFET for Bluetooth Low-Energy (BLE) Modulation and Instantaneous Channel Hopping Using 32.768kHz Reference
Min-Shueh Yuan1, Chao-Chieh Li1, Chia-Chun Liao1, Yu-Tso Lin1,
short-range wireless transceivers, such as BLE, is to use a crystal oscillator (XO) in the tens-of-MHz range as a frequency reference (FREF) to phase lock an RF oscillator [1-4]. This ensures a sufficiently wide PLL band
ISSCC 2018 Session 28 Wireless
A 0.8V 0.8mm2 Bluetooth 5/BLE Digital-Intensive Transceiver with a 2.3mW Phase-Tracking RX Utilizing a Hybrid Loop Filter for Interference Resilience in 40nm CMOS
Ming Ding1, Xiaoyan Wang1, Peng Zhang1, Yuming He1, Stefano Traferro1,
Kenichi Shibata2, Minyoung Song1, Hannu Korpela1, Keisuke Ueda2, Yao-Hong Liu1, Christian Bachmann1, Kathleen Philips1 imec - Holst Centre, Eindhoven, The Netherlands Renesas Electronics, Tokyo, Japan 1 2 This paper pres
ISSCC 2018 Session 28 Wireless
An ADPLL-Centric Bluetooth Low-Energy Transceiver with 2.3mW Interference-Tolerant Hybrid-Loop Receiver and 2.9mW Single-Point Polar Transmitter in 65nm CMOS
Hanli Liu, Zheng Sun, Dexian Tang, Hongye Huang, Tohru Kaneko,
achieving ultra-low-power (ULP) operation for Internet-of-Things (IoT) applications. As more and more devices will be connected and access to the Internet, the wireless traffic will be extremely crowded in the 2.4GHz ISM
ISSCC 2018 Session 28 Wireless
An 802.11ax 4×4 Spectrum-Efficient WLAN AP Transceiver SoC Supporting 1024QAM with Frequency-Dependent IQ Calibration and Integrated Interference Analyzer
Shusuke Kawai1, Hiromitsu Aoyama2, Rui Ito3, Yutaka Shimizu3, Mitsuyuki Ashida3,
Asuka Maki3, Tomohiko Takeuchi3, Hiroyuki Kobayashi3, Go Urakawa3, Hiroaki Hoshino3, Shigehito Saigusa3, Kazushi Koyama4, Makoto Morita2, Ryuichi Nihei2, Daisuke Goto2, Motoki Nagata3, Kengo Nakata3, Katsuyuki Ikeuchi1,
ISSCC 2018 Session 27 Power Management
An On-Chip Resonant-Gate-Drive Switched-Capacitor Converter for Near-Threshold Computing Achieving 70.2% Efficiency at 0.92A/mm2 Current Density and 0.4V Output
Moataz Abdelfattah1, Muhammad Swilam1, Brian Dupaix2, Shane Smith1,
promising approach to address the increasing demand for energy efficiency in computing platforms. In NTC, the supply voltage is scaled down to realize quadratic energy savings while degrading the operating frequency only
ISSCC 2018 Session 27 Power Management
94% Power-Recycle and Near-Zero Driving-DeadZone N-Type Low-Dropout Regulator with 20mV Undershoot at Short-Period Load Transient of Flash Memory in Smart Phone respectively. The dynamic bias I1 (IDYN) is about 0.05% of IOUT and the ratio of I2 to I1 is about 1/40. Consequently, at maximum ILOAD=800mA, the proposed LDO performs about 94% power recycling of the controller by recycling dynamic current I1=400μA while I2 and the constant quiescent current of the other controller are 10μA and 15μA, respectively.
Wei-Chung Chen, Tzu-Chi Huang, Chao-Chang Chiu, Chih-Wei Chang, Kuo-Chun Hsu
On the other hand, the proposed ARFF compensation in Figure 27.8.2 provides a dominant pole for frequency compensation and enhances the transient response. For achieving high SR without sacrificing large quiescent curren
ISSCC 2018 Session 27 Power Management
A 2TX Supply Modulator for Envelope-Tracking Power Amplifier Supporting Intra- and Inter-Band Uplink Carrier Aggregation and Power Class-2 High-Power User Equipment
Takahiro Nomiyama1, Yongsik Youn2, Younghwan Choo1, Dongsu Kim1,
Jaeyeol Han1, Junhee Jung1, Jongbeom Baek1, Sungjun Lee1, Euiyoung Park1, Jeonghyun Choi1, Ji-Seon Paek1, Jongwoo Lee1, Thomas Byunghak Cho1, Inyup Kang1 Samsung Electronics, Hwaseong, Korea Samsung Semiconductor, San Jo
ISSCC 2018 Session 27 Power Management
An 87.1% Efficiency RF-PA Envelope-Tracking Modulator for 80MHz LTE-Advanced Transmitter and 31dBm PA Output Power for HPUE in 0.153μm CMOS
Chen-Yen Ho, Shih-Mei Lin, Che-Hao Meng, Hao-Ping Hong,
Sheng-Hong Yan, Ting-Hsun Kuo, Chia-Sheng Peng, Chieh-Hsun Hsiao, Hsin-Hung Chen, Da-Wei Sung, Chien-Wei Kuan MediaTek, Hsinchu, Taiwan Modulation schemes employed in long-term-evolution advanced (LTE-A) services for hig
ISSCC 2018 Session 27 Power Management
A 95.2% Efficiency Dual-Path DC-DC Step-Up Converter with Continuous Output Current Delivery and Low Voltage Ripple
Se-Un Shin1, Yeunhee Huh1, Yongmin Ju1, Sungwon Choi1,
Changsik Shin1, Young-Jin Woo1, Minseong Choi1, Se-Hong Park1, Young-Hoon Sohn1, Min-Woo Ko1, Youngsin Jo1, Hyunki Han1, Hyung-Min Lee2, Sung-Wan Hong3, Wanyuan Qu4, Gyu-Hyeong Cho1 KAIST, Daejeon, Korea Korea University
ISSCC 2018 Session 27 Power Management
A 97% High-Efficiency 6µs Fast-Recovery-Time BuckBased Step-Up/Down Converter with Embedded 1/2 and 3/2 Charge-Pumps for Li-Ion Battery Management
Min-Woo Ko1, Ki-Duk Kim1, Young-Jin Woo2, Se-Un Shin1, Hyun-Ki Han1,
Yeunhee Huh1, Gyeong-Gu Kang1, Jeong-Hyun Cho1, Sang-Jin Lim1, Se-Hong Park1, Hyung-Min Lee3, Gyu-Hyeong Cho1 KAIST, Daejeon, Korea Siliconworks, Daejeon, Korea 3 Korea University, Seoul, Korea 1 2 Lithium-ion batteries
ISSCC 2018 Session 27 Power Management
An 86% Efficiency SIMO DC-DC Converter with One
Boost, One Buck, and a Floating Output Voltage for, Car-Radio
Arunkumar Salimath1, Edoardo Bonizzoni1, Edoardo Botti2, Giovanni Gonano2, Paolo Cacciagrano2, Davide Luigi Brambilla2, Tommaso Barbieri2, Franco Maloberti1 University of Pavia, Pavia, Italy; 2STMicroelectronics, Cornare
ISSCC 2018 Session 27 Power Management
A 10MHz Time-Domain-Controlled Current-Mode Buck Converter with 8.5% to 93% Switching Duty Cycle
Jin-Gyu Kang, Min-Gyu Jeong, Jeongpyo Park, Changsik Yoo
Current-mode DC-DC converters offer various advantages over voltage-mode DCDC converters such as much simpler frequency compensation, automatic over-current protection, and faster transient response [1,2]. For current-mo
ISSCC 2018 Session 27 Power Management
A 0.22-to-2.4V-Input Fine-Grained Fully Integrated Rational Buck-Boost SC DC-DC Converter Using Algorithmic Voltage-Feed-In (AVFI) Topology Achieving 84.1% Peak Efficiency at 13.2mW/mm2
Yang Jiang1, Man-Kay Law1, Pui-In Mak1, Rui P. Martins1,2
Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 Most existing switched-capacitor (SC) DC-DC converters only offer a few voltage conversion ratios (VCRs), leading to significant efficiency fluctuatio
ISSCC 2018 Session 26 RF & Wireless
A 13th-Order CMOS Reconfigurable RF BPF with Adjustable Transmission Zeros for SAW-Less SDR Receivers
Pingyue Song, Hossein Hashemi
Current cellular receivers often employ acoustic filters (SAW or BAW) for each communication band due to their high selectivity, low insertion loss, and small formfactor. The need to support multiple communication bands,
ISSCC 2018 Session 26 RF & Wireless
A 12mW 70-to-100GHz Mixer-First Receiver Front-End for mm-Wave Massive-MIMO Arrays in 28nm CMOS
Lorenzo Iotti, Greg LaCaille, Ali M. Niknejad
Multi-user multiple-input multiple-output (MIMO) systems are promising enablers for high-capacity wireless access in next-generation mobile networks. Leveraging antenna arrays at the access point, narrow beams can be ste
ISSCC 2018 Session 26 RF & Wireless
A Coupled-RTWO-Based Subharmonic Receiver FrontEnd for 5G E-Band Backhaul Links in 28nm Bulk CMOS
Marco Vigilante, Patrick Reynaert
A fully integrated receiver for high-capacity 5G E-Band Backhaul links (71 to 76GHz and 81 to 86GHz) needs a local-oscillator (LO) distribution network with >19% tuning range (TR) and accurate quadrature phases. Further,