Papers 2008–2026

architectures can employ more than 20 PLLs [1]. To address SoC clocking needs with an ever reducing power budget, a deep sub-mW to low-mW PLL having a FoM between -226dB and -234dB from 0.8GHz to 5GHz is presented. The P

low-jitter clock generator, as it does not suffer much from jitter accumulation [1-4]. By periodically replacing the output edge of the oscillator by a clean edge of the reference, an MDLL has a large effective loop band

Multiplying delay-locked loops (MDLLs) are gaining popularity due to their superior noise performance over conventional phase-locked loops (PLLs) [1,2]. Recent designs are trending towards an all-digital implementation t

incorporate power management techniques such as dynamic frequency scaling (DFS), which dynamically changes operating frequencies, and dynamic core-count scaling (DCCS), which rapidly power cycles the cores between active

Tae Yong Lee, Nohhyup Kwak, Woo Yeol Shin, Na Yeon Kim, Yunseok Hong, Kyeong Pil Kang, Dong Yoon Ka, Seong Ju Lee, Yong Sun Kim, Young Kyu Noh, Jaehoon Kim, Dong Keum Kang, Ho Uk Song, Hyeon Gon Kim, Jonghoon Oh SK hynix

Dae Suk Kim, Chunseok Jeong, Tae Sik Yun, Hongjung Kim, Ho Sung Cho, Yeon Ok Kim, Jae Hwan Kim, Jin Ho Kim, Sangmuk Oh, Hyun Sung Lee, Ki Hun Kwon, Dong Beom Lee, Young Jae Choi, Jeajin Lee, Hyeon Gon Kim, Jun Hyun Chun,

Seong-Young Seo, Min-Sang Park, Dong-Hak Shin, Won-Chang Jung, Sang-Hoon Shin, Je-Min Ryu, Hye-Seung Yu, Jae-Hun Jung, Kyung-Woo Nam, Seouk-Kyu Choi, Jae-Wook Lee, Uksong Kang, Young-Soo Sohn, Jung-Hwan Choi, Chi-Wook Ki

Hye-Yoon Joo, Seung-Jun Bae, Young-Soo Sohn, Young-Sik Kim, Kyung-Soo Ha, Min-Su Ahn, Young-Ju Kim, Yong-Jun Kim, Young-Ju Kim, Ju-Hwan Kim, Won-Jun Choi, Chang-Ho Shin, Soo Hwan Kim, Byeong-Cheol Kim, Seung-Bum Ko, Kwan

systems-on-chip and usually limits their voltage scalability, due to the major impact of process/voltage/temperature (PVT) variations at low voltages [1]. Assist techniques to extend SRAM operating voltage range improve

which use multiport memories to improve performance by enabling multiple simultaneous operations in the same memory bank. Conventional 2-read/write 8T dual-port SRAMs (2RW) suffer from read and write disturb issues when

Taejoong Song, Woojin Rim, Sunghyun Park, Yongho Kim, Jonghoon Jung, Giyong Yang, Sanghoon Baek, Jaeseung Choi, Bongjae Kwon, Yunwoo Lee, Sungbong Kim, Gyuhong Kim, Hyo-Sig Won, Ja-Hum Ku, Sunhom Steve Paak, ES Jung, Ste

automotive electronics has placed mounting pressure on silicon-based power converters to be increasingly reliable and efficient. Automotive electronics operate from the car battery (VIN) which experiences cold-cranks and

isolation is becoming an essential requisite for several low-power applications, such as sensor interfaces and medical devices. In the last years, different solutions of silicon-integrated data transmission with galvanic

logic circuits, we have measured 19-stage ring oscillators. Figure 16.6.3 plots the measured stage delay as a function of varying supply voltage. At 0.5V VDD and 1V Vbias, the ring oscillator exhibits a frequency of 28kH

medical-grade, high resolution, high dynamic range X-ray backplane based on a-IGZO thin-film technology with fast readout. This enables low dose, video rate X-ray imaging. Fast X-ray imaging will find its applications no

Sigurd Wagner, James C. Sturm, Naveen Verma Princeton University, Princeton, NJ EEG is an important modality for many medical purposes. However, the lowamplitude of signals (10-to-100μV) and large number of channels (~20

Alessio Meneghetti2, Hesong Xu1, Daniele Perenzoni1, Guglielmo Morgari3, David Stoppa1 Fondazione Bruno Kessler, Trento, Italy, 2University of Trento, Povo, Italy, 3Telsy, Torino, Italy 1 A robust true random number gene

While small lowcost tagging solutions for supply-chain management exist, security in the face of fault-injection [1] and side-channel attacks [2] remains a concern. Power glitch attacks [3] in particular attempt to leak

Noureddine Tayebi1, Grace M. Credo1, David J. Liu1, Handong Li1, Kai Wu1, Xing Su1, Madoo Varma1, Oguz H. Elibol1 Architecturally each array is arranged like an imager and the chip contains 8 arrays of 32×32 pixels for a

West Silicon EURL, Hottot les Bagues, France 1 2 Efforts to improve the resolution and power-efficiency of ADCs continue unabated, as is well documented in [2]. Although the number of new switchedcapacitor (SC) ADC publi

stereo channels to achieve effective acoustic noise and echo cancellation, thus demanding ADCs with low power and minimal die area. Zoom-ADCs should be well suited for such applications, since they combine compact and en

baseband ADC of an LTE-A receiver. To boost user throughput and increase network capacity, CT-DSMs will need to increase signal bandwidth (BW) while maintaining sufficient dynamic range (DR) and good power efficiency. Fo

Cambridge, MA 1 2 The width of RF bands commonly used for cellular telecommunications has grown from 35-to-75MHz for 2G/3G/4G platforms to 100-to-200MHz for today’s LTE, and the desire for relaxed image-rejection filteri

IIT Madras, Chennai, India Many industrial applications require high-resolution ADCs whose low-frequency performance is important. CTDSMs are attractive due to their implicit antialiasing and resistive inputs. However, t

DEE, FCT, Universidade NOVA de Lisboa, Caparica, Portugal, CTS-UNINOVA, Caparica, Portugal 1 2 ΔΣM performance can be improved by using MASH or SMASH structures to obtain higher-order noise shaping [1]. They have better

Shagun Bajoria1, Jan Niehof1, Robert Rutten1, Bert Oude-Essink2, Franco Fritschij2, Jagdip Singh2, Gerard Lassche2 NXP Semiconductors, Eindhoven, The Netherlands, Catena Microelectronics, Delft, The Netherlands 1 2 The t

Technology advancement has recently made it attractive to replace the flash quantizer (QTZ) in a multibit ΔΣ modulator by an asynchronous successiveapproximation-register (ASAR) QTZ to improve the overall power efficienc

Jiayi Zhu, Yijin Zhao, Jinjia Zhou, Shuping Zhang, Shinji Kimura, Takeshi Yoshimura, Satoshi Goto Waseda University, Kitakyushu, Japan 8K Ultra HD is being promoted as the next-generation digital video format. From a com

Internet-ofEverything (IoE) devices to data center servers for intelligent recognition processes is impractical for energy reasons, requiring in-situ processing of such data. However, algorithms accelerated by previous r

Nvidia, Westford, MA 1 2 Deep learning using convolutional neural networks (CNN) gives state-of-the-art accuracy on many computer vision tasks (e.g. object detection, recognition, segmentation). Convolutions account for

Sudhir K. Satpathy, Steven K. Hsu, Amit Agarwal, Ram K. Krishnamurthy Intel, Hillsboro, OR Energy-efficient k-nearest-neighbor (kNN) computations are key building blocks for computer vision, classification, and machine-l

applications, such as unmanned delivery services. The robots, shown in Fig. 14.3.1, have enhanced controllers that realize AI functions, such as perception (information extraction) and cognition (decision making). Histor

forward-collision warning, advanced emergency braking, adaptive cruise control, and lane-keeping assistance. Recently, automotive black boxes are installed in cars for tracking accidents or theft. In this paper, a dual-m

substitute due to their ease of use and suitability for advanced applications, such as gaming and augmented reality (AR) [1-2]. Most current HMD systems suffer from: 1) a lack of rich user interfaces, 2) short battery li

communication systems is dominated by the tradeoff between cost and performance. While the former claims ever-smaller footprints and bill of materials (BOM), the latter comprises a stringent set of requirements regarding

Shinji Sato, Satoshi Kondo, Tomohiro Ueno, Teerachot Siriburanon, Shoutarou Maki, Bangan Liu, Yun Wang, Noriaki Nagashima, Masaya Miyahara, Kenichi Okada, Akira Matsuzawa Tokyo Institute of Technology, Tokyo, Japan It is

Kristof Vaesen1, Davide Guermandi1, Vito Giannini1,3, Steven Brebels1, Fortunato Frazzica1, André Bourdoux1, Charlotte Soens1, Wim Van Thillo1, Piet Wambacq1,2 imec, Heverlee, Belgium, Vrije Universiteit Brussel, Brussel

University of California, Santa Barbara, CA 1 2 High-capacity microwave systems demand high-efficiency transmit architectures that support complex waveforms with high peak-to-average-power-ratio (PAPR) modulation. The ou

Noriaki Nagashima1, Jun Emmei1, Masato Dome1, Hisashi Kato1, Jian Pang1, Yoichi Kawano2, Toshihide Suzuki2, Taisuke Iwai2, Yuuki Seo1, Kimsrun Lim1, Shinji Sato1, Li Ning1, Kengo Nakata1, Kenichi Okada1, Akira Matsuzawa1

capabilities to acquire imagery during night and inclement weather is indispensable for remote sensing, traffic mapping, etc. Recent unmanned aerial vehicles (UAVs) have been miniaturized to <1m3, providing an inexpensiv

1.3 shows the circuit implementation of the low-power PI used in the phase DAC. The PI stage consists of two complementary parts, each interpolating between the rising or falling edges of the two input clocks, respective

Modern SoC designs employed in battery-life-constrained mobile applications feature multiple power domains to dynamically scale power-performance tradeoffs in response to application demands. Since each power domain requ

High-voltage linear drivers for multiple-string LEDs have been widely used in general lighting due to their low cost, simplicity, low electromagnetic interference (EMI), and high reliability. However, in conventional mul

Nan Hua University, Hsinchu, Taiwan 1 The calibration process of the ACC technique is described by the flow chart in Fig. 12.7.3. When ACC detects that LEDs are all on, the output voltage is sensed and defined as VOt. Le

causes a large output voltage undershoot ΔVUS and long settling time ts if the transient responses are slow [1]. Since the output capacitor current ICo instantly reflects ΔIload, transient response optimization for minim

Wide input rails (12V to 100V) are common in today’s automotive and industrial systems. Miniaturized DC-DC voltage regulators (VRs), which can provide a lowvoltage regulated output from a wide input range and deliver a f

In recent years, significant progress has been made on switched-capacitor DC-DC converters as they enable fully integrated on-chip power management. New converter topologies overcame the fixed input-to-output voltage lim

Switched-capacitor (SC) DC-DC converters have gained attention based on their ability to offer a low-cost high-efficiency power conversion, and allow a thin and compact module packaging [1]. However, the SC DC-DC convert

In recent years, there has been an ever-increasing interest in monolithic power supplies. Integrating the power supply with the application has many direct benefits, including a reduction of the bill of materials and red

Switched-capacitor (SC) DC-DC converters have several advantages over inductive DC-DC converters in that they are easily integrated on-chip and can scale to desired power levels, rendering themselves promising for integr