全部论文

Papers 2008–2026

共 3875 篇 ISSCC 论文，按年份倒序排列

年份 Year
2026 2472025 2422024 2222023 2002022 1672021 1952020 2022019 1812018 2052017 2082016 2002015 1912014 2032013 2102012 1882011 1962010 2102009 1802008 228
领域 Topic
RF & Wireless 362Power Management 302Wireline I/O 300Wireless 293Data Converters 279Digital Processors 268Memory 266AI / ML 231Digital Circuits 220Medical & Bio 211Image Sensors 184Analog Circuits 169mm-Wave 138Clocking & PLLs 127Sensors 100Plenary 63Hardware Security 36Quantum & Photonics 29Industry Highlights 7
顶级机构
University of California 101Delft University of Technology 73University of Macau 58KAIST 51Massachusetts Institute of Tec 48Tsinghua University 39National Taiwan University 38University of Michigan 37Georgia Institute of Technolog 35Columbia University 28Hong Kong University of Scienc 24MediaTek 23
ISSCC 2025 Session 9 Power Management
A 6.78MHz Single-Stage Regulating Rectifier with Dual Outputs Simultaneously Charged in a Half Cycle Achieving 92.2% Efficiency and 131mW Output Power
Quanrong Zhuang1, Junyi Sun1, Bo Li1, Jie Lu1, Xin Zhang2, Yi Shi1, Hao Qiu1
IBM T. J. Watson Reseach Center, Yorktown Heights, NY 1 2 Wireless power transfer to implanted devices is an elegant solution that can obviate the need for batteries [1–5]. As more functions are implemented in the implan
Nanjing University, Nanjing, China
ISSCC 2025 Session 9 Power Management
A 102ns/V 94.3%-Peak-Efficiency Symbol-Power-Tracking Supply Modulator for 5G NR Power Amplifiers
Minghao Shang, Baochuang Wang, Changjin Chen, Ji Jin, Lin Cheng
As 5G communication technology advances, the power consumption of radio frequency power amplifiers (RFPAs) in 5G systems has become increasingly critical. To enhance efficiency, Symbol Power Tracking (SPT) has emerged as
University of Science and Technology of China, Hefei, China
ISSCC 2025 Session 9 Power Management
A 74W/48V Monolithic-GaN Integrated Adjustable Multilevel Supply Modulator for 5G Base-Station Massive-MIMO Arrays
Hieu Minh Pham1, Peter Asbeck1, Donald F. Kimball1, Navneet Sharma2,
Shenggang Dong2, Masoud Shahshahani2, Won Suk Choi2, Gary Xu2, Marcus Michel3, Ratul Das3,4, Robert Beach3, Hanh-Phuc Le1 University of California, San Diego, CA Samsung Research America, Plano, TX 3 Efficient Power Conv
ISSCC 2025 Session 9 Power Management
A 400MHz Symbol-Power-Tracking (SPT) Supply Modulator with SPT-Adaptive-Biasing Network Supporting 5G FR2 CMOS PA
Jongbeom Baek, Ali Niknejad
The 5G new-radio (NR) frequency-range-2 (FR2) for cellular communications supports a maximum channel bandwidth of 400MHz [1] and utilizes orthogonal frequency-division multiplexing (OFDM) to support high data rates with
University of California, Berkeley, CA
ISSCC 2025 Session 9 Power Management
A 98.3%-Peak-Efficiency Single-Mode Hybrid Buck-Boost Converter with 7mV Maximum Output Ripple for Li-Ion Battery Management
Ji Jin1, Ruoshu Yang1, Weiwei Xu2, Lin Cheng1
Hefei CLT Microelectronics, Hefei, China 1 2 Hybrid buck-boost converters have been extensively studied for their ability to efficiently convert varying battery voltages (e.g., 2.8V to 4.2V) to a stable mid-3V output in
University of Science and Technology of China, Hefei, China
ISSCC 2025 Session 9 Power Management
A 93%-Peak-Efficiency Battery-Input 12-to-36V-Output Inductor-in-the-Middle Hybrid Boost Converter with Continuous Input and Output Currents and Fast Transient with No RHP Zero
Yifan Jiang1,2, Yan Lu2,3, Tiantian Tang1, Junmin Jiang1
University of Macau, Macau, China 3 Tsinghua University, Beijing, China 1 2 Recent emerging applications, such as LiDAR transceivers for autonomous driving and motor drivers for drones and robots, raise the requirements
Southern University of Science and Technology, Shenzhen, China
ISSCC 2025 Session 9 Power Management
An 85-to-230VAC to 3.3-to-4.6VDC 1.52W Capacitor-Drop Sigma-Floating-SC AC-DC Converter with 81.3% Peak Efficiency
Fei Song*1, Shousheng Han*1,2, Rui P. Martins1, Yan Lu1,2
Tsinghua University, Beijing, China 1 2 *Equally Credited Authors (ECAs) The internet-of-things (IoT) and smart home devices, such as smart power meters and smart remote control, have great demand for high-efficiency, lo
University of Macau, Macau, China
ISSCC 2025 Session 8 Digital Circuits
An On-Cell Monitoring and Balancing System With Near-Field Communications for EV Batteries
Daniel McMitchell, Simon Foster, Scott Block, Magnus Manson, Simon Quinn, Joel Sylvester
Dukosi, Edinburgh, United Kingdom A battery cell monitoring system for automotive and grid energy storage applications is presented. As part of a battery management system (BMS) it enhances pack performance and reliabili
ISSCC 2025 Session 8 Digital Circuits
Fine-Grained Spatial and Temporal Thermal Profiling of a 16nm CMOS Buck Converter and SoC Load-Current Emulator Using Low-Voltage Micron-Scale Thermal Sensors
Zakir Ahmed, Suhwan Kim, Charles Augustine, Harish K. Krishnamurthy,
Krishnan Ravichandran, James W. Tschanz, Vivek De Intel, Hillsboro, OR Localized hotspots across high-power-density monolithic systems-on-chip (SoCs) and heterogenous 3D SoCs with integrated voltage regulators (IVR) pose
ISSCC 2025 Session 8 Digital Circuits
A Dual VDD-Temperature Sensor Employing Sensor Fusion with 2.4°C, 9mV (±3σ) Inaccuracy in 65nm CMOS
Hikmet Seha Ozturk1, Julian Arenas1, Carlos Tokunaga2, Nasser Kurd2, Visvesh Sathe1
escalated thermal and power delivery challenges in modern Systems-in-Package (SiPs) [1]. Increased power density and degraded thermal conductance intensify thermal hotspots. Meanwhile, workload-dependent supply-voltage (
Georgia Institute of Technology, Atlanta, GA 2 Intel, Hillsboro, OR 1
ISSCC 2025 Session 8 Digital Circuits
A 0.024mm2 All-Digital Fractional Output Divider with 257fs Worst-Case Jitter Using Split-DTC-Based Background Calibration
Yan Yu1,2, Deng Luo1, Jianjun Chen1, Yang Guo1, Bin Liang1, Yaqing Chi1,
Nanjing, China 1 2 In modern system-on-chips (SoCs), compact, low-jitter and low-power on-chip clock generators are essential for delivering multiple output frequencies to various modules, including microprocessors, IO i
Hanhan Sun1, Jing Xiao2, Hao Gao3, Ming Tao2, Kai Tang2 National Unive
ISSCC 2025 Session 8 Digital Circuits
A Command-Aware Hybrid LDO for Advanced HBM Interfaces with 150µA Quiescent Current and 20pF On-Chip Capacitor Achieving Sub-10mV Voltage Droop in 400ps Settling Time
Jaeho Kim*1, Myeongho Han*1, Jooeun Bang1,2, Younghyun Lim3, Jaehyouk Choi1
KAIST, Daejeon, Korea 3 Kyung Hee University, Yongin, Korea 1 2 *Equally Credited Authors (ECAs) With the advent of the generative AI era, high-bandwidth memory (HBM) has emerged as an irreplaceable solution that can pro
Seoul National University, Seoul, Korea
ISSCC 2025 Session 8 Digital Circuits
A Dynamically Reconfigurable Digital-Integrated Voltage-Regulator Fabric for Energy-Efficient DVFS in Multi-Domain SoCs
Julian Arenas, Chi-Hsiang Huang, Kevin Patino-Sosa, Jung-Jin Park,
Regulator (VR) architecture (Fig. 8.3.1), using Buck regulators to each drive a group of Low Dropout (LDO) regulated domains. The domain with the highest Vdd requirement within each group – the critical domain – sets the
Hikmet Seha Ozturk, Visvesh Sathe Georgia Institute of Technology, Atl
ISSCC 2025 Session 8 AI / ML
Run-Time Power Management System by On-Die Power Sensor with Silicon Machine Learning-Based Calibration in a 3nm Octa-Core CPU
Chien-Yu Lu1, Bo-Jr Huang1, Min-Chieh Chen1, Alfred Tsai1, Eric Jia-Wei Fang1,
Yuju Cho1, Rex Che-Yuan Liu1, Ericbill Wang1, You-Ming Tsao1, Hugh Mair2, Shih-Arn Hwang1 MediaTek, Hsinchu, Taiwan MediaTek, Austin, TX 1 2 For flagship smartphones, the gaming experience has become one of essential dem
ISSCC 2025 Session 8 Digital Circuits
Dynamic Guard-Band Features of the IBM zNext System
Tobias Webel1, Phillip J. Restle2, Ramon Bertran2, Alper Buyuktosunoglu2,
Sean M. Carey3, Alejandro Cook1, Karl Anderson3, Michael Romain3, Thomas Strach1, Pradeep Bhadravati Parashurama4, Aishwarya Tadkase4, Rahman Abber Tahir1, Luke Jenkins3, Kevin Low3, Eberhard Engler1 IBM Systems, Böbling
ISSCC 2025 Session 7 Wireline I/O
A 60Gb/s NRZ Burst-Mode CDR with Cross-Injection Locking and Flash Phase Detector Achieving 0.13ns Reconfiguration Time in 28nm CMOS
Shangjie Wei, Renjie Tang, Chenyao Cao, Yu Su, Kanan Wang, Zhengyang Ye,
bandwidth and thermal power bottlenecks [1]. The increasing demands of the AI-centric data center impose more stringent requirements on low latency and high bandwidth [2]. Rapidly reconfigurable photonic switch networks
Huanfa Sun, Kun Fu, Xiaoyan Gui Xi’an JiaoTong University, Xi’an, Chin
ISSCC 2025 Session 7 Wireline I/O
A Reference-less CDR Using SAR-Based Frequency-Acquisition Technique Achieving 55ns Constant Band-Searching Time and up to 63.64Gb/s/µs Acquisition Speed
Xiaoteng Zhao, Yuhao Zhang, Hao Chang, Yilong Dong, Chenxi Han, Zekai Yang,
in applications that demand a continuous data rate due to their simplicity and cost-effectiveness, as they eliminate the need for an external reference [1-6]. The frequency acquisition (FA) speed of such CDRs is critical
Zhicheng Dong, Rong Zhou, Shubin Liu, Zhangming Zhu Xidian University,
ISSCC 2025 Session 7 Wireline I/O
A 2.06pJ/b 106.25Gb/s PAM-4 Receiver with 3-Tap FFE and 1-Tap Speculative DFE in 28nm CMOS
Yen-Po Lin, Yun-Cheng Jao, Wu-Hung Hsieh, Pen-Jui Peng
The increasing demand for I/O bandwidth in data center pushes the data rate of serial links up to 100Gb/s. Although ADC-based receivers have powerful and flexible DSP equalization that can compensate for >20dB channel lo
National Tsing Hua University, Hsinchu, Taiwan
ISSCC 2025 Session 7 Wireline I/O
A 353mW 112Gb/s Discrete Multitone Wireline Receiver Datapath with Time-Based ADC in 5nm FinFET
Jaewon Lee1,2, Pier-Andrea Francese2, Matthias Brändli2, Thomas Morf2,
demand for higher communication bandwidth between processors through wired interconnects in large-scale servers has been driving the need to increase the perlane data rate beyond the current 112Gb/s. Recently demonstrate
Marcel Kossel2, Seoyoung Jang1, Gain Kim1 Daegu Gyeongbuk Institute of
ISSCC 2025 Session 7 Wireline I/O
A 112Gb/s DSP-Based PAM-4 Receiver with an LC-Resonator-Based CTLE for >52dB Loss Compensation in 4nm FinFET the CTLE_HF equivalent CM circuit in Fig. 7.4.3, the inductor coupling factor k can push the CM resonance frequency much higher than the cut-off frequency of the next stage’s SCC. Since the RLC network’s low-frequency impedance is small, which is given as a sum of the inductor ESR and a CM termination, the CTLE CM gain can be kept low over all frequency range.
Henry Park*1, Qaiser Nehal*1, Miguel Gandara1, Atharav Atharav1, Joonyeong Lee1, Another potential source of a ringing r
GPUs, long-reach high-speed interconnects with data rates of 100Gb/s or higher are widely demanded for many different applications such as Ethernet/Optical standards or PCIe 7.0. Despite the latest advances in DSP-based
Jengfeng Li2, Tamer Ali1 MediaTek, Irvine, CA 2 MediaTek, Hsinchu, Tai
ISSCC 2025 Session 7 Wireline I/O
A 1.11pJ/b 224Gb/s XSR Receiver with Slice-Based CTLE and PI-Based Clock Generator in 12nm CMOS
Bingyi Ye1,2, Tianchen Ye1, Tianyuan Zhong1, Zhiwen Huang1, Lei Shen1,
Integrated Circuits, Beijing, China 1 2 Over the past few decades, process scaling and architecture advancements have led to an exponential increase in transceiver data rates. Recently, 224Gb/s DSP-based receivers (RXs)
Boyang Zhang1, Dunshan Yu1, Yandong He1, Weixin Gai1,3 Peking Universi
ISSCC 2025 Session 7 Wireline I/O
A 2.2pJ/b 212.5Gb/s PAM-4 Transceiver with >46dB Reach in 5nm FinFET
A. Mostafa1, A. Hassan1, A. Hsu2, A.K. Singh3, C.-H. Wu4, C.-R. Yang1,
D. Prabakaran3, D. Storaska5, D. Zhou1, D. Visani1, E. Hsiao1, F. Chu1, F. Khan1, F. Lu1, G. Cui1, G. Wang1, J. Natonio5, J. Deng1, J. Ding1, J. Guo1, J. Gu1, J. Zang1, L. Jiang1, K.-M. Lu4, M. Hasan1, M. Kelly6, M. H. K
ISSCC 2025 Session 7 Wireline I/O
An 8-to-28GHz 8-Phase Clock Generator Using Dual-Feedback Ring Oscillator in 28nm CMOS
Yechen Tian, Junjie Gu, Weitao He, Shuai Liu, Hao Xu, Na Yan
Multi-phase clock generation is among the most critical building blocks in high-speed wireline transceivers. The integrated jitter and phase error of the clocks often dictate the maximum available SNDR at higher frequenc
Fudan University, Shanghai, China
ISSCC 2025 Session 7 Wireline I/O
A 212.5Gb/s DSP-Based PAM-4 Transceiver with 50dB Loss Compensation for Large AI System Interconnects in 4nm FinFET
E-Hung Chen*1, Henry Park*2, Mohammed Abdullatif*2, Miguel Gandara2,
Ahmed ElShater2, Amr Khashaba2, Shih-Hao Huang1, Tsz-Bin Liu1, Atharav Atharav2, Joonyeong Lee2, Qaiser Nehal2, Mohamed Megahed2, Yusang Chun2, Cheng-En Shieh1, Vidhan Jolly2, SoonWon Kwon2, Hsin-Ta Chien1, Ke-Chung Wu1,
ISSCC 2025 Session 6 Image Sensors
A Compact 10b Source Driver IC with Delta-Sigma Pulse Width Modulation for Low-Voltage Digital Interpolation Achieving 1884µm2/Channel
Jun Yeol An1,2, Seung Hun Choi1, Jaewoong Ahn1, Seunghoon Baek2,
flagship smartphones has contributed to better quality 3D image rendering and mobile gaming applications. However, high-resolution displays require source-driver ICs (SD-IC) with more channels, significantly increasing t
Youngmin Kim2, Si-Woo Kim2, Jae-Yeol Lee2, Yoon-Kyung Choi1, Hyung-Min
ISSCC 2025 Session 6 Image Sensors
A Real-Time Pixel-Compensated Source-Driver IC with Dual-Slope Error Detection and Multi-Channel Time-Multiplexing Compensator for Compact OLED Displays
Jaewoong Ahn, Seung Hun Choi, Jun Yeol An, Minseong Um, Hyung-Min Lee
Active-matrix organic light-emitting diode (AMOLED) displays, especially those using lowtemperature polycrystalline silicon (LTPS) thin-film transistors (TFTs), have been widely used in mobile devices thanks to their hig
Korea University, Seoul, Korea
ISSCC 2025 Session 6 Image Sensors
A 10b Source-Driver IC with All-Channel Automatic Offset Calibration and Slew-Rate-Enhanced Amplifier Achieving 2273μm2/Channel and 1.9mV DVO for 6285-PPI OLED-on-Silicon Displays
Junghwan Oh*, Wiman Yoo*, Dong-Kun Lee, Jong-Seok Kim
*Equally Credited Authors (ECAs) Recent microdisplays for augmented reality (AR) and virtual reality (VR) devices face distinct technical challenges compared to traditional displays, with the essential requirements being
Hanyang University, Ansan, Korea
ISSCC 2025 Session 6 Image Sensors
A 320×256 6.9mW 2.2mK-NETD 120.4dB-DR LW-IRFPA with Pixel-Paralleled Light-Driven 20b Current-to-Phase ADC
Yi Zhuo1, Hangyu Lu2, Ding Ma3, Zheng Zhou1, Linxiao Shen1, Yacong Zhang1,
Technical Physics Chinese Academy of Sciences, Shanghai, China 1 2 Long-wavelength (LW) cryogenic (from 80 down to 40K) infrared focal plane arrays (IRFPAs) are extensively employed because of their sensitivity and rapid
Zhongjian Chen1, Xixin Cao1, Yimao Cai1, Ning Li2,3, Wengao Lu1 Peking
ISSCC 2025 Session 6 Image Sensors
A 25.2Mpixel 120frames/s Full-Frame Global-Shutter CMOS Image Sensor with Pixel-Parallel ADC
Toshiki Kainuma, Ryo Wakamatsu, Kimitaka Wada, Tohru Takeda, Shota Ueyama,
(RS) currently dominate the market for consumer cameras, particularly interchangeable lens cameras (ILCs). Despite their widespread use, conventional sensors with RS, such as [1], have limitations in image expression due
Hiroki Suto, Tsukasa Miura, Koushi Uemura, Masao Kimura, Masaki Sakaki
ISSCC 2025 Session 6 Image Sensors
A 400×400 3.24µm 117dB-Dynamic-Range 3-Layer Stacked Digital Pixel Sensor
Tsung-Hsun Tsai1, Kwuang-Han Chang2, Andrew Berkovich1, Raffaele Capoccia3,
Song Chen1, Zhao Wang4, Chiao Liu1, Yi-Hsuan Lin2, Sheng-Yeh Lai2, Hao-Ming Hsu2, Hirofumi Abe5, Kazuya Mori5, Hideyuki Fukuhara5, Chih-Hao Lin2, Toshiyuki Isozaki5, Wei-Chen Li2, Wei-Fan Chou2, Masayuki Uno5, Rimon Iken
ISSCC 2025 Session 6 Image Sensors
SPAD Flash LiDAR with Chopped Analog Counter for 76m Range and 120klx Background Light
Hyun-Seung Choi1,2, Injun Park1,3, Byungchoul Park4, Dongseok Cho1,5,
Korea 5 Samsung Electronics, Hwasung, Korea 1 2 Flash LiDAR sensors are becoming increasingly important in many automotive, space, and robotic applications. However, achieving long range, high depth resolution, and high
Myung-Jae Lee1, Youngcheol Chae1,3 Yonsei University, Seoul, Korea Kor
ISSCC 2025 Session 6 Image Sensors
An Asynchronous 160×90 Flash LiDAR Sensor with Dynamic Frame Rates of 5 to 250fps Based on Pixelwise ToF Validation via a Background-Light-Adaptive Threshold
Seonghyeok Park1,2, Su-Hyun Han1, Jongbeom Kim1, Jubin Kang1,
Sogang University, Seoul, Korea 1 2 Over the past few decades, LiDAR technology has become a cornerstone in various fields, including autonomous vehicles, augmented reality, and robotics. Unlike traditional scanning LiDA
Jung-Hoon Chun2,3, Jaehyuk Choi2,3, Seong-Jin Kim4 Ulsan National Inst
ISSCC 2025 Session 6 Image Sensors
A 10.5mW Automotive Touch AFE IC Featuring Radiated EMI Reduction Based on Pipelined Dual-Frequency Modulation and Sine2 Waveform Shaping for CISPR 25 Class 5 Compliance
Seokhyeon Moon1, Jonghang Choi1,2, Jun-Eun Park1
Samsung Electronics, Hwaseong, Korea 1 2 Recent automobiles increasingly incorporate touch-screen interfaces instead of traditional buttons and knobs. These automotive touch-screen sensors offer versatile functionality a
Sungkyunkwan University, Suwon, Korea
ISSCC 2025 Session 6 Image Sensors
A 3-Stacked Hybrid-Shutter CMOS Image Sensor with Switchable 1.2µm-Pitch 50Mpixel Rolling Shutter and 2.4µm-Pitch 12.5Mpixel Global Shutter Modes for Mobile Applications
Heesung Shim, Seung-Sik Kim, Min-Woong Seo, Sangsu Park, Hyukbin Kwon,
Yongjun Kim, Sanggwon Lee, Sungbong Park, Daehee Bae, Si Gyoung Koo, Masamichi Ito, Jae-hoon Jeon, Sol Yoon, Sung-Jae Byun, Sangyoon Kim, KwanSik Kim, Gihwan Cho, Joonho Lee, Tekyou Kim, Sungjae Jun, Jae-kyu Lee, Chang-R
ISSCC 2025 Session 5 RF & Wireless
A 21-to-31GHz DPD-less Quadrature RFDAC with Invariant Impedance and Scalable LO Leakage
Huizhen Jenny Qian, Wubo Qin, Chenxi Qiu, Yintang Yang
The increasing data-rates of modern wireless communication systems require transmitters with high linearity to support high-order QAM modulation and wide modulation bandwidths. Digital transmitters based on RF digital-to
Xidian University, Xi’an, China
ISSCC 2025 Session 5 RF & Wireless
A 20W CMOS/LDMOS All-Digital Transmitter with Dynamic
Retiming and Glitch-Free Phase Mapper, Achieving 68%/62%, Peak Drain/System Efficiency
Dieuwert Peter Nicolaas Mul1, Rob J Bootsman1, Mohammadreza Beikmirza1, Ossama El Boustani1, Yiyu Shen1, Daniel Maassen2, Bart van Velzen2, Mohadig Rousstia2, Ronald Koster2, John R Gajadharsing2, Thomas Fritzsch3, Morte
ISSCC 2025 Session 5 RF & Wireless
A Power-Efficient CORDIC-less Digital Polar Transmitter Using 1b DSM-Based PA Supporting 256-QAM
Yuncheng Zhang, Zezheng Liu, Duo Li, Minzhe Tang, Yi Zhang, Hongye Huang,
Dingxin Xu, Waleed Madany, Ashbir Aviat Fadila, Wenqian Wang, Yuang Xiong, Daxu Zhang, Garry Pranata Kusuma, Hiroyuki Sakai, Kazuaki Kunihiro, Atsushi Shirane, Kenichi Okada Institute of Science Tokyo, Tokyo, Japan CMOS
ISSCC 2025 Session 5 RF & Wireless
An Ultra-Compact Wideband Load-Insensitive Complex-Cascode LC-Neutralized Power Amplifier for 4:1-VSWR-Resilient Operations in Large-Scale Phased Arrays
Mohamed Eleraky1, Tzu-Yuan Huang1,2, Hua Wang1
ARGUS SPACE AG, Zurich, Switzerland 1 2 Large-scale mm-wave phased arrays are crucial for the success of next-generation 5G/6G communication. Yet, using a dense array of antennas inevitably leads to mutual coupling betwe
ETH Zürich, Zürich, Switzerland
ISSCC 2025 Session 5 RF & Wireless
A 22nm FDSOI CMOS-Based Compact 3-Stack Doherty Power Amplifier with a Stacked OPA-Based Bias Scheme Achieving >16.5dBm Pavg for 5G FR2 Applications
Jooseok Lee, Hansik Oh, Seungjae Baek, Seungwon Park, Dongsoo Lee,
interest in the millimeter-wave (mm-wave) band. In this frequency range, phased-array systems are crucial for sustaining communication performance despite high propagation loss. In highly integrated phased-array systems,
Sehyug Jeon, Taewan Kim, Joonho Jung, Sung-gi Yang Samsung Electronics
ISSCC 2025 Session 5 RF & Wireless
A 56-to-64GHz Linear Power Amplifier with 30.2dBm Psat and 23.5% PAEpeak Using Scalable Matched-Zone-Expanding Radial Power Combining with EM-Loss Reduction in 40nm Bulk CMOS
Deshan Tang, Bingzheng Yang, Aoran Han, Xun Luo
Increasing demands on millimeter-wave (mm-wave) wireless transmission, including 5G NR FR2-2 and SATCOM, require low-cost, high-power, and high-efficiency power amplifier (PA) supporting multi-Gb/s data-rates. A major ch
University of Electronic Science and Technology of China, Chengdu, Chi
ISSCC 2025 Session 5 RF & Wireless
Spatial-Temporal Direct-Digital Beamforming Power Amplifier with Enhanced Back-Off Efficiency in a 24GHz Phased Array
Yutian Zhao1, Yiyang Song1, Weiyan Gu1, Shiyuan Yu1, Zhehao Yu2, Yuxiang Han1,
mm-Wave transmitters face challenges such as degraded back-off efficiency and the use of low-efficiency and bulky phase shifters when transmitting high-order constellations with a typical peak-to-average power ratio (PAP
Xinen Zhu3, Xuyang Lu1 Shanghai Jiao Tong University, Shanghai, China
ISSCC 2025 Session 5 RF & Wireless
A Blocker-Tolerant mm-Wave Low-Noise Amplifier Utilizing Doherty Active Load Modulation for Linearity Enhancement
Hao Yu, Lianbo Liu, Sensen Li
Conventionally, the linearity of receivers (RXs) or low-noise amplifiers (LNAs) has not been a primary design focus, as they are generally optimized for handling weak input signals. However, emerging applications such as
University of Texas, Austin, TX
ISSCC 2025 Session 5 RF & Wireless
A 3.5mW mm-Wave Low-Noise Active Bandpass Filter Employing an All-Passive Interferer-Cancellation Feedforward Path
Ahmed Gharib Gadelkarim, Patrick Mercier
Millimeter-wave (mm-wave) frequencies are widely used in applications that require high throughput and/or small sizes thanks to the wide available bandwidth and small achievable antenna-array sizes. Applications such as
University of California, San Diego, CA
ISSCC 2025 Session 5 RF & Wireless
A GaN SLCG-Doherty-Continuum Power Amplifier Achieving >38% 6dB Back-Off Efficiency over 1.35 to 7.6GHz
Guansheng Lv1, Wenhua Chen1, Xiaofan Chen1, Fei Huang2, Zhenghe Feng1
Gaxtrem Technology, Beijing, China 1 2 To maximize throughput, wireless standards often mandate channels with hundreds of MHz bandwidths (BWs) over multiple non-contiguous bands. In addition, as spectrally efficient comp
Tsinghua University, Beijing, China
ISSCC 2025 Session 4 Analog Circuits
A 0.4µW/MHz Reference-Replication-Based RC Oscillator with Path-Delay and Comparator-Offset Cancellation Achieving 9.83ppm/°C from -40 to 125°C of the capacitor charging, the relationship between the period with VOS and Td can be calculated. Compared with the conventional structure, the proposed one has significantly improved robustness, as shown in Fig. 4.5.1 (top right). The circuit implementation and timing diagram are detailed in Fig. 4.5.3. It is mainly
Yueduo Liu1, Zihao Zhu1, Xinyu Yang1, Rongxin Bao1, Zehao Zhang2, composed of a VREF generator, an RC branch, a pulse ge
Hongshuai Zhang1, Jiaxin Liu1, Zheng Wang1, Mingkang Zhang3, Na Yan4, Jun Yin2, counter, and the comparator. The dynamic switches in the VREF generator are triggered by the output signal Φ. When Φ=1, VREF is generated by
ISSCC 2025 Session 4 Analog Circuits
A 0.36nW/0.9V 32kHz Crystal Oscillator Using Analog Regulation for Cross-Current Avoidance
Tobias Chlan, Markus Dietl, Ralf Brederlow
Timekeeping with limited energy plays a critical role in many battery-driven Internet-ofThings (IoT) applications. For this purpose, 32kHz oscillators [1-9] with high accuracy and ultra-low-power (ULP) consumption are ne
Technical University Munich, Munich, Germany
ISSCC 2025 Session 4 Analog Circuits
A 1.8-to-3.0GHz Fully Integrated All-In-One CMOS Frequency Management Module Achieving -47/+42ppm Inaccuracy from -40 to 95°C and -150/+70ppm After Accelerated Aging
Runtao Huo1, Tong Zhang1, Weihao Jie1, Yanling Zheng1, Deyong Li1, Li Gao2,
University of California, San Diego, CA 1 Accurate and stable frequency-management modules (FMMs) are a critical component in wired/wireless communication systems since they determine key metrics such as data rate and bi
Yang Zhao1, Honglan Jiang1, Yongfu Li1, Patrick Mercier3, Hui Wang1 Sh
ISSCC 2025 Session 4 Analog Circuits
A 12.8GS/s Sub-Sampling ADC Front-End with 38GHz Input Bandwidth and >39dB SNDR for 1 to 32GHz in 22nm FDSOI
Josef Heel1, Harijot Singh Bindra1, Simon Louwsma2, Alessandro Dezzani3, Bram Nauta1
with the crowded wireless spectrum results in a trend towards millimeter-wave frequencies. RF-sampling architectures offer advantages in terms of flexibility, simplicity and robustness. However, presenting the ADC direct
University of Twente, Enschede, The Netherlands 2 Teledyne DALSA Semic
ISSCC 2025 Session 37 Digital Circuits
A 13.5µW 35-Keyword End-to-End Keyword Spotting System Featuring Personalized On-Chip Training in 28nm CMOS
Hyuk-Jin Lee1, Kyunghoon Pyo1, Taekwang Jang2, Mingoo Seok3, SeongHwan Cho1
customized to individual users. However, keyword spotting (KWS), a feature that is gaining widespread adoption in many personal devices, remains largely non-user-configurable as it is designed for the general public. Whi
KAIST, Daejeon, Korea ETH Zürich, Zürich, Switzerland 3 Columbia Unive
ISSCC 2025 Session 37 Digital Circuits
A 28nm 18.1µJ/Acquisition End-to-End GPS Acquisition Accelerator with Energy-Accuracy-Driven Mixed-Radix IFFT and ROM-Assisted Computing
Sangsu Jeong1, Sungjin Park1, Mingoo Seok2, Dongsuk Jeon1
Columbia University, New York, NY 1 (Fig. 37.7.3, top). The butterfly unit receives 8 real inputs and 8 imaginary inputs in signand-magnitude format, through an input router switching between them. When real (imaginary)
Seoul National University, Seoul, Korea