全部论文

Papers 2008–2026

共 3875 篇 ISSCC 论文，按年份倒序排列

年份 Year
2026 2472025 2422024 2222023 2002022 1672021 1952020 2022019 1812018 2052017 2082016 2002015 1912014 2032013 2102012 1882011 1962010 2102009 1802008 228
领域 Topic
RF & Wireless 362Power Management 302Wireline I/O 300Wireless 293Data Converters 279Digital Processors 268Memory 266AI / ML 231Digital Circuits 220Medical & Bio 211Image Sensors 184Analog Circuits 169mm-Wave 138Clocking & PLLs 127Sensors 100Plenary 63Hardware Security 36Quantum & Photonics 29Industry Highlights 7
顶级机构
University of California 101Delft University of Technology 73University of Macau 58KAIST 51Massachusetts Institute of Tec 48Tsinghua University 39National Taiwan University 38University of Michigan 37Georgia Institute of Technolog 35Columbia University 28Hong Kong University of Scienc 24MediaTek 23
ISSCC 2025 Session 37 AI / ML
A 22nm 60.81TFLOPS/W Diffusion Accelerator with Bandwidth-Aware Memory Partition and BL-Segmented Compute-in-Memory for Efficient Multi-Task Content Generation
Yiqi Jing1, Jiaqi Zhou1, Yiyang Sun1, Siyuan He1, Peiyu Chen2,3, Ru Huang1, Le Ye1,2, Tianyu Jia1
Initially applied for image synthesis [1], Diffusion Models (DMs) have been rapidly expanded into many content-generation tasks, e.g. 3D scenes [2-3] or video [4], and deliver exceptional performance. Figure 37.6.1 provi
Peking University, Beijing, China Advanced Institute of Information Te
ISSCC 2025 Session 37 Digital Circuits
SKADI: A 28nm Complete K-SAT Solver Featuring Dual-Path SRAM-Based Macro and Incremental Update with 100% Solvability
Zihan Wu, Xiyuan Tang, Tao Zhang, Lishan Lin, Haoyang Luo, Bocheng Xu,
applications in various fields, including electronic design automation [1], formal verification [2], and fault diagnosis [3]. The objective of the K-SAT problem is to determine whether a truth assignment exists for n Boo
Zhongyi Wu, Jiahao Song, Yitao Liang, Xiaochen Bo, Yuan Wang Peking Un
ISSCC 2025 Session 37 Digital Circuits
SHINSAI: A 586mm2 Reusable Active TSV Interposer with Programmable Interconnect Fabric and 512Mb 3D Underdeck Memory
Bo Jiao*1, Haozhe Zhu*1, Yuman Zeng1, Yongjiang Li1, Jie Liao1, Siyao Jia1,
Zexing Chen1, Mochen Tian2, Jundong Zhu2, Dexin Wen2, Yan Wang2, Yu Wang2, Jian Xu2, Feng Wang2, Jun Tao1, Chixiao Chen1, Qi Liu1, Ming Liu1 Fudan University, Shanghai, China Kiwimoore Semiconductors, Shanghai, China Fig
ISSCC 2025 Session 37 AI / ML
Monolithic In-Memory Computing Microprocessor for End-to-End DNN Inferencing in MRAM-Embedded 28nm CMOS Technology with 1.1Mb Weight Storage
Soonwan Kwon1,2, Sungmeen Myung1, Jangho An1, Hyunsoo Kim1, Minje Kim1,
Hyungwoo Lee1, Wooseok Yi1, Seungchul Jung1, Daekun Yoon1, Shinhee Han3, Saeyoon Chung3, Kilho Lee3, Jeong-Heon Park3, Kangho Lee3, Sang Joon Kim1, Donhee Ham1,4 Samsung Advanced Institute of Technology, Suwon, Korea Seo
ISSCC 2025 Session 37 Digital Circuits
A 2-Dimensional mm-Scale Network-on-Textiles (kNOTs) for Wearable Computing with Direct Die-to-Yarn Integration of 0.6×2.15mm2 SoC and bySPI Chiplets
Anjali Agrawal1, Zhenghong Chen1, Braden E. Desman1, Jinhua Wang1,
Akiyoshi Tanaka1, Fahim Foysal1, Charlie D. Hess1, Will Farrell2, Jim Owens2, Daniel S. Truesdell1, Benton H. Calhoun1 University of Virginia, Charlottesville, VA Nautilus Defense LLC, Pawtucket, RI 1 2 This paper propos
ISSCC 2025 Session 37 Digital Circuits
IBM Telum II Processor Design-Technology Co-Optimizations
for Power, Performance, Area, and Reliability
David Wolpert1, Gerry Strevig2, Chris Berry1, Leon Sigal3, Bill Huott1, Mark Cichanowski2, Matthias Pflanz4, Tobias Werner4, Philipp Salz4, Nick Jing1, Michael Romain1, Iris Leefken4, Richard Serton1, Rajesh Veerabhadrai
ISSCC 2025 Session 36 RF & Wireless
A 212Gb/s PAM-4 Retimer with Integrated High-Swing Optical Driver and Chip-to-Module Long Reach Capability of 40dB in 5nm FinFET
V Gurumoorthy1, A Tan1, A Iyer1, A Fan2, A Farhoodfar1, B Alnabulsi3, B Helal1,
C Abidin2, C Loi4, D Cartina5, H Lo1, I Fabiano6, J Riani1, J H Teo4, J Q Wang1, K Raviprakash1, K K Ravi Prakash1, L Cai4, L Patra1, M Bachu1, N Codega6, N Shivashankar1, S Ray1, S Chong4, S Jafarlou2, S Yu4, T-F Wu2, W
ISSCC 2025 Session 36 RF & Wireless
A 100Gbaud 4Vppd Distributed Linear Driver with Cross-Folded Transmission Lines and Cross-Coupled Gm Cells for Built-in 5-Tap FFE in 0.13μm SiGe BiCMOS
Fuzhan Chen1,2, C. Patrick Yue2, Quan Pan1
Hong Kong University of Science and Technology, Hong Kong, China 1 2 Linear pluggable optics (LPO) emerges as an attractive candidate for short-reach optical communications for its low power consumption, low cost and low
Southern University of Science and Technology, Shenzhen, China
ISSCC 2025 Session 36 RF & Wireless
A 1.54pJ/b 64Gb/s 16-QAM Intradyne Coherent Optical Receiver in 28nm CMOS
Ahmed E. Abdelrahman, Mohamed Badr Younis, Mohamed Osama Selim,
Mohamed Saad Aly, Mahmoud A. Khalil, Pavan Kumar Hanumolu University of Illinois, Urbana, IL As the demand for high-speed data transmission within data centers continues to grow, scaling existing short-reach optical link
ISSCC 2025 Session 36 RF & Wireless
A 112Gb/s 0.61pJ/b PAM-4 Linear TIA Supporting Extended PD-TIA Reach in 28nm CMOS
Yangyi Zhang*, Zhenyu Yao*, Wentao Zhou*, Xiongshi Luo, Zhenghao Li,
artificial intelligence applications pushes optical communications to higher data rates and lower cost. Co-packaging the PD, BiCMOS TIA, and CMOS switch ASIC on the same substrate can effectively improve signal integrity
Dongshen Zhan, Quan Pan Southern University of Science and Technology,
ISSCC 2025 Session 36 RF & Wireless
A Low-Latency 200Gb/s PAM-4 Heterogeneous Transceiver in 0.13μm SiGe BiCMOS and 28nm CMOS for Retimed Pluggable Optics
Renjie Tang*, Kanan Wang*, Shuyi Xiang, Yu Su, Chenyao Cao, Yukun He, Xiaoyan Gui
intelligence (AI) requires further bandwidth enhancement and has pushed SerDes towards 200G/lane [1]. Linear-drive pluggable optics (LPO) without integrated retimer or digital signal processer (DSP) has drawn great atten
Xi’an JiaoTong University, Xi’an, China *Equally Credited Authors (ECA
ISSCC 2025 Session 36 RF & Wireless
A 0.9pJ/b 108Gb/s PAM-4 VCSEL-Based Direct-Drive Optical Engine
Sashank Krishnamurthy*, Susnata Mondal*, Junyi Qiu, Tolga Acikalin,
applications necessitates advancements in data transmission. Increasingly complex, power-hungry equalization and digital signal processing (DSP) techniques limit electrical interconnect scalability and reach. Pluggable o
Soumya Bose, Shuhei Yamada, James Jaussi, Mozhgan Mansuri Intel, Hills
ISSCC 2025 Session 36 RF & Wireless
A 0.29pJ/b 5.27Tb/s/mm UCIe Advanced Package Link in 3nm FinFET with 2.5D CoWoS Packaging
Didem Turker Melek1, R. NavinKumar2, James Vandersand3, Pyare Sarkar2,
Prakash BS2, Adrian Leuciuc4, Kevin Geary5, Shaojun Ma1, Chirag Mukesh Mehta1, Basant Bothra2, Shashi Jain2, Pawan Sabharwal6, Ranjan Vaish1, Kirti Bhanushali3, Yutong Ding7, Craig Frost4, John Annunziata4, Krishanu Sadh
ISSCC 2025 Session 36 RF & Wireless
A 64Gb/s/wire 10.5Tb/s/mm/layer Single-Ended Simultaneous Bi-Directional Transceiver with Echo and Crosstalk Cancellation for a Die-to-Die Interface in 28nm CMOS
Zhifei Wang1, Zhiwen Huang1, Tianchen Ye1, Bingyi Ye2, Fangzhu Li1, Wei Wang1,3,
The development of artificial intelligence and high-performance computing has fueled the demand for increased edge density and reduced bit error rate (BER) in die-to-die interfaces. One approach to improving the edge den
Dunshan Yu1, Weixin Gai1,3 Peking University, Beijing, China East Chin
ISSCC 2025 Session 36 RF & Wireless
A 32Gb/s 10.5Tb/s/mm 0.6pJ/b UCIe-Compliant Low-Latency Interface in 3nm Featuring Matched-Delay for Dynamic Clock Gating calibration, and the clock is subsequently gated to save power during idle. The QEC, controlled digitally by an FSM, features chopping cancellation to eliminate DC offset and device mismatches. The DCC and QEC achieve less than 0.3% duty cycle error and 330fs quadrature phase error.
Mu-Shan Lin1, Chien-Chun Tsai1, Shenggao Li2, Wei-Chih Chen1,
Wen-Hung Huang1, Yu-Chi Chen1, Yu-Jie Huang1, Alan Drake3, Chin-Hua Wen1, Paul Ranucci3, Hsin-Hung Kuo1, Aidong Yin3, Shu-Chun Yang1, Farsheed Mahmoudi3, Han-Tzung Ke1, Chao-Chieh Li1, Nai-Chen Cheng1, Jimmy Wang4, Kevin
ISSCC 2025 Session 35 Medical & Bio
DustNet: A Network of Time-Division Multiplexed Ultrasonic Implants with 16-Level ASK Backscatter Modulation
Changuk Lee*, Jade Pinkenburg*, Mohammad Meraj Ghanbari*, Cem Yalcin,
can give insight into the operation of neurological circuits and provides opportunities to restore function in patients with nerve damage. Realtime activity data from specific, spatially distributed efferent nerves provi
Miguel Montalban, Rikky Muller University of California, Berkeley, CA
ISSCC 2025 Session 35 Medical & Bio
A Programming-Free Three-Dimensional Resonant Current-Mode Wireless Receiver with Real-Time Link-Adaptivity and a 0.904cm3 Receiver Coil for Implantable Systems
Jong-Hun Kim, Seung-Ju Lee, Yeon-Woo Jeong, Mun-Jung Cho, Min-Sik Kim,
of diseases affecting the nervous, circulatory, and endocrine systems [1-3,5]. Charging the battery embedded in IMDs using conductors poses the risks of infection and aversion to surgery, leading to the development of wi
Myeong-Ho Kim, Se-Un Shin Pohang University of Science and Technology,
ISSCC 2025 Session 35 Medical & Bio
An Enhanced-Frequency-Splitting-Based Wireless Power and Data Transfer System Achieving 60.2% End-to-End Efficiency and 1Mb/s Data Rate with a Sub-cm RX Coil for Miniaturized Implants
Yechan Park1, Phan Dang Hung2, Donghyun Youn1, Daehyeon Kwon1, Chul Kim1, Minkyu Je1
invasiveness and complexity of the device-deployment process. In such miniaturization, the main bottleneck is wireless power and data transfer (WPDT), particularly the volume of the receiver (RX) coil. Conventionally, on
KAIST, Daejeon, Korea Samsung Electronics, Hwaseong, Korea 1 2 Implant
ISSCC 2025 Session 35 Medical & Bio
A Wireless Adiabatic Stimulator System with Current-Mode Power Reception and Stimulus Current Regulation Achieving Precise Charge Delivery and Electrode Scalability for Miniaturized Electroceuticals
Yechan Park, Chul Kim, Minkyu Je
Electroceuticals that directly stimulate nerves are attracting attention as their effectiveness on various intractable diseases has been verified [1]. In such wireless implantable neurostimulators, miniaturizing the rece
KAIST, Daejeon, Korea
ISSCC 2025 Session 35 Medical & Bio
A Miniature Biomedical Implant Secured by Two-Factor Authentication with Emergency Access
Wei Wang*, Yumin Su*, Huan-Cheng Liao, Yiwei Zou, Tian Qiu, Kaiyuan Yang
*Equally Credited Authors (ECAs) The advancement of miniature implantable medical devices (IMDs) has made remarkable progress toward creating minimally invasive and broadly accessible therapeutic and monitoring solutions
Rice University, Houston, TX
ISSCC 2025 Session 35 Medical & Bio
A 30MHz Wideband 92.7dB SNR 99.6% Accuracy Bioimpedance Spectroscopy IC Using Time-to-Digital Demodulation with Co-Prime Delay Locked Sampling
Jiayang Li, Dai Jiang, Yu Wu, Andreas Demosthenous
The permittivity and conductivity of bioimpedance in tissues are governed by α, β, and γ dispersions, with biological features detectable in the tens of MHz range. Wideband spectroscopy is required in many applications i
University College London, London, United Kingdom
ISSCC 2025 Session 35 Medical & Bio
A Spatial-Domain Compressive-Sensing Photoacoustic Imager with Matrix-Multiplying SAR ADC
Huan-Cheng Liao*, Shunyao Zhang*, Yumin Su, Arvind Govinday, Yiwei Zou,
technologies promise a paradigm shift to preventive, proactive, and accessible health care. Real-time and long-term imaging offers unprecedented insights into one’s body conditions, enabling constant monitoring of highri
Wei Wang, Vivek Boominathan, Ashok Veeraraghavan, Lei Li, Kaiyuan Yang
ISSCC 2025 Session 35 Medical & Bio
A Single-Inductor-Based High-Voltage Transmit Beamformer for Wearable Ultrasound Devices Achieving 88% fCV2 Power Reduction
Peng Guo, Zu-Yao Chang, Michiel A. P. Pertijs, Tiago L. Costa
Compared to its implant-based electrical counterpart, ultrasonic vagus nerve stimulation alters neuronal activity through mechanical ultrasound waves, emerging as a promising non-invasive therapy for managing drug-resist
Delft University of Technology, Delft, The Netherlands
ISSCC 2025 Session 34 Digital Circuits
A 47.3-to-58.4GHz Differential Quasi-Class-E Colpitts Oscillator Achieving 198.8dBc/Hz FoMT
Changwenquan Song*, Zehui Kang*, Chen Yu, Liang Wu
*Equally Credited Authors (ECAs) The increasing demand for complex modulation schemes to achieve high data-rates in millimeter-wave (mm-wave) communication systems necessitates local-oscillation (LO) signals with excepti
Chinese University of Hong Kong, Shenzhen, China
ISSCC 2025 Session 34 Digital Circuits
An 18.5-to-23.6GHz Quad-Core Class-F23 Oscillator Without 2nd/3rd Harmonic Tuning Achieving 193dBc/Hz Peak FoM and 140-to-250kHz 1/f3 PN Corner in 65nm CMOS
Hanzhang Cao*1, Sichen Gao*1, Jin Jin1, Xiaolong Liu2, Wen Wu1, Tongde Huang1
Southern University of Science and Technology, Shenzhen, China 1 2 *Equally Credited Authors (ECAs) Rapid development of wireless communication technology makes low phase-noise (PN) millimeter-wave (mm-wave) oscillators
Nanjing University of Science and Technology, Nanjing, China
ISSCC 2025 Session 34 Digital Circuits
A 9.05-to-37.0GHz LO Generator with Magnetic Mode Switching and Tuning-Free Octave-Bandwidth Common-Mode Resonator Achieving >190.7dBc/Hz FoM
Hao Guo, Yaolong Hu, Taiyun Chi
VCOs with a wide tuning range (TR) are crucial for achieving universal frequency coverage in multi-band communications, software-defined radios, and electronic warfare applications. A TR exceeding one octave is particula
Rice University, Houston, TX
ISSCC 2025 Session 34 Digital Circuits
A 4.75GHz Digital PLL with 45.8fs Integrated-Jitter and 257dB FoM Based on a Voltage-Biased Harmonic-Shaping DCO with Adaptive Common-Mode Resonance Tuning
Stefano Gallucci*1, Francesco Tesolin*1, Pietro Salvi1, Daniele Lodi Rizzini1,
Simone Mattia Dartizio1, Carlo Samori1, Andrea Leonardo Lacaita1, Salvatore Levantino1 Politecnico di Milano, Milan, Italy now with Kandou Bus SA, Saint-Sulpice, Switzerland 1 2 *Equally Credited Authors (ECAs) The numbe
Riccardo Moleri1, Francesco Buccoleri1,2, Michele Rossoni1, Giacomo Ca
ISSCC 2025 Session 34 Digital Circuits
A 380µW and -242.8dB FoM Digital-PLL-Based GFSK Modulator with sub-20µs Settling Frequency Hopping for Bluetooth Low-Energy in 22nm CMOS
Simone Mattia Dartizio*1, Giacomo Castoro*1, Stefano Gallucci*1,
Saleh Karman2, Andrea Leonardo Lacaita1, Salvatore Levantino1 Politecnico di Milano, Milan, Italy Infineon Technologies, Villach, Austria 1 2 *Equally Credited Authors (ECAs) Ultra-low power (ULP) Bluetooth Low-Energy (B
Michele Rossoni1, Riccardo Moleri1, Francesco Tesolin1, Pietro Salvi1,
ISSCC 2025 Session 33 Other
A 224GHz 19.9% TR Varactor-less VCO Utilizing a Multi-Section Switch-Loaded Coupled-Line Resonator
Ahmed Elmenshawi1, Sriram Muralidharan2, Mona M. Hella1
Analog Devices, Beaverton, OR 1 2 THz and sub-THz waves are key enablers for novel sensing and imaging solutions. THz gasphase spectroscopy, hyperspectral imaging, and high-speed communication are among many applications
Rensselaer Polytechnic Institute, Troy, NY
ISSCC 2025 Session 33 Other
A Wideband Bidirectional Calibration-Free Frequency/Switching-Staggering 360° D-Band Phase Shifter with Frequency-Invariant Codes Achieving <2.38°/0.63dB RMS-Errors Over 24% Bandwidth
Basem Abdelaziz Abdelmagid, Yuqi Liu, Hua Wang
With the increasing need for high data-rate and channel throughput, the D-band (110 to 170GHz) has been actively explored for beyond-5G and 6G wireless communication, sensing, and radar applications [1,2]. To overcome th
ETH Zürich, Zürich, Switzerland
ISSCC 2025 Session 33 Other
A 125-to-170GHz Power-Efficient Phase Shifter in SiGe BiCMOS with Outphasing Gain and Phase Corrections
Lorenzo Piotto, Guglielmo De Filippi, Andrea Mazzanti
Advancements in silicon technologies are opening the way to sub-THz phased-array transceivers, enabling high-resolution radar sensors, and wireless communications with a fiber-like transport capacity. Programmable phase
University of Pavia, Pavia, Italy
ISSCC 2025 Session 33 Other
A 216-to-226GHz Watt-Level GaN Solid-State Power Amplifier with Multiband Large-Signal Impedance Correction and Circuit-Package Co-Design Technique
Weibo Wang*1,2, Zhe Li*3, Kai Li3, Haifeng Cheng1,2, Fangjin Guo1,2, Yibin Zhang1,2, Keping Wang3
Tianjin, China 1 2 *Equally Credited Authors (ECAs) Compact and integrated 220GHz solid-state power amplifiers (SSPAs) are important in enabling future high-data-rate wireless communication, imaging, and radar systems. S
National Key Laboratory of Solid-State Microwave Devices and Circuits,
ISSCC 2025 Session 33 Other
A 232-to-260GHz CMOS Amplifier-Multiplier Chain with a
Low-Cost, Matching-Sheet-Assisted Radiation Package and, 11.1dBm Total Radiated Power
Jinchen Wang, Daniel Sheen, Xibi Chen, Steven F. Nagle, Ruonan Han Massachusetts Institute of Technology, Cambridge, MA Terahertz (THz) signal sources and radiators are essential for a variety of future applications, suc
ISSCC 2025 Session 32 Power Management
A Dynamic-RON-Diminished Bidirectional GaN Load Switch with Inrush Current Protection and Spike Attenuation
Po-Jui Chiu1, Tz-Wun Wang1, Xiao-Quan Wu1, Chi-Yu Chen1, Yu-Ting Huang1,
Chien-Wei Cho1, Sheng-Hsi Hung1, Yu-Tse Shih1, Ke-Horng Chen1, Kuo-Lin Zheng2, Ying-Hsi Lin3, Shian-Ru Lin3, Tsung-Yen Tsai3, Hann-Huei Tsai4 National Yang Ming Chiao Tung University, Hsinchu, Taiwan Chip-GaN Power Semic
ISSCC 2025 Session 32 AI / ML
A 2W 53.2%-Peak-Efficiency Multi-Core Isolated DC-DC Converter with Embedded Magnetic-Core Transformer Achieving CISPR-32 Class-B EMI Compliance and <5mV Ripple
Dongfang Pan1, Weiwei Xu2, Litang Zhang1, Qi’ao Huang1, Lin Cheng1,2
Hefei CLT Microelectronics, Hefei, China 1 2 Integrated isolated DC-DC converters, using either on-chip [1-4] or package transformers [5-7], have been developed to minimize size and cost while achieving isolation ratings
University of Science and Technology of China, Hefei, China
ISSCC 2025 Session 32 Power Management
A Dual-LC-Resonant Isolated DC-DC Converter Achieving 65.4% Peak Efficiency and Inherent Backscattering
Qi’ao Huang*, Dongfang Pan*, Zhengyu Chen, Lin Cheng
*Equally Credited Authors (ECAs) Power delivery with galvanic isolation is crucial for ensuring safety and reliability in harsh industrial environments, where isolated DC-DC converters are widely used to meet stringent o
University of Science and Technology of China, Hefei, China
ISSCC 2025 Session 32 Power Management
An Accurate Secondary-Side Controller with GaN-Based CGS Isolated Driver Achieving Sub-1% Error On-Chip Sensing
Chi-Yu Chen1, Tz-Wun Wang1, Po-Jui Chiu1, Yu-Ting Huang1, Xiao-Quan Wu1,
Chien-Wei Cho1, Sheng-Hsi Hung1, Yu-Tse Shih1, Ke-Horng Chen1, Kuo-Lin Zheng2, Ying-Hsi Lin3, Shian-Ru Lin3, Tsung-Yen Tsai3, Hann-Huei Tsai4 National Yang Ming Chiao Tung University, Hsinchu, Taiwan Chip-GaN Power Semic
ISSCC 2025 Session 32 Power Management
A Single-Link Multi-Domain-Output (SLiMDO) Isolated DC-DC Converter with Passive Magnetic Flux Sharing for Local Energy Distribution and Rx Behavior Sensing-Based Global Power Modulation
Jianqiang Jiang, Lei Zhao, Junyao Tang, Cheng Huang
Galvanically isolated DC-DC converters are gaining more attention in industry for industrial automation and electrical vehicles (e.g., motor drives, battery management systems), consumer electronics (e.g., power adapters
Iowa State University, Ames, IA
ISSCC 2025 Session 32 Power Management
A 180MHz 45.3%-Peak-Efficiency Isolated Converter Using Q-Downsize Class-D Power Amplifier with Inherent Shoot-Through Current Blocking and High Tolerance for Efficiency Despite Frequency Misalignments
Tian Xia*1, Qiujin Chen*1, Shujing Wang1, Rui P. Martins1,2, Mo Huang1
Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 *Equally Credited Authors (ECAs) Isolated DC-DC converters [1-8] with low electromagnetic interference (EMI) are crucial for system safety and reliabi
University of Macau, Macau, China
ISSCC 2025 Session 31 Power Management
A 91.25% Peak Power-Conversion-Efficiency Capacitive PowerManagement IC Supporting up to 5.68mJ Burst Energy Delivery Using a Single External Capacitor for mm-Scale IoT Applications
Qishen Fang1, Feiyu Li1, Rui P. Martins1,2, Man-Kay Law1
Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 As Internet of Things (IoT) devices continue to shrink in size, the limited available system energy is becoming a major bottleneck. Even though the sy
University of Macau, Macau, China
ISSCC 2025 Session 31 Power Management
A Rectifier-less Piezoelectric Energy-Harvesting Interface with a Sense & Track MPPT Achieving Single-Cycle Convergence and 568% Shock Power Improvement
Shunmin Jiang*1, Xinling Yue*1, Yuchen Ma1, Chao Wang2, Sijun Du1
Huazhong University of Science and Technology, Wuhan, China 1 2 *Equally Credited Authors (ECAs) The number of edge sensors for the Internet-of-Things (IoT) has been increasing dramatically every year to feed servers and
Delft University of Technology, Delft, The Netherlands
ISSCC 2025 Session 31 Power Management
A Biased-SECE Interface for Piezoelectric Energy Harvesting with Geometric-Mean-Computational MPPT Achieving 99.9%
MPPT Efficiency, 8.75Cycles/∆VOC Tracking, and 9.3x Energy, Extraction
harvesting (PEH)—which converts ambient vibrations into electrical energy—has emerged [1–6]. The interface circuit in a PEH system plays a crucial role not only in energy extraction and conversion but also in enabling th
Jiho Lee, Hyun-Sik Kim KAIST, Daejeon, Korea As the demand for sustain
ISSCC 2025 Session 31 Power Management
An Inductor-less Capacitor-less Synchronous PiezoelectricElectromagnetic Hybrid Energy Harvesting Platform with Coil-Sharing Scheme
Yuchen Wei*1, Xinling Yue*1, Zhiyuan Chen2, Sijun Du1
Fudan University, Shanghai, China 1 2 *Equally Credited Authors (ECAs) Along with the rise of the Internet of Things (IoT) and edge artificial intelligence (AI), energy harvesting provides a promising sustainable power s
Delft University of Technology, Delft, The Netherlands
ISSCC 2025 Session 30 Memory
A 64Gb DDR4 STT-MRAM Using a Time-Controlled Discharge-Reading Scheme for a 0.001681μm2 1T-1MTJ Cross-Point Cell
Kosuke Hatsuda1, Katsuhiko Hoya1, Ryousuke Takizawa1, Fumiyoshi Matsuoka1,
Takaya Yasuda1, Akira Katayama1, Tadashi Miyakawa1, Kazuyo Senju1, Kazuki Okawa1, Yuka Furukawa1, Yu Shimada1, Katsuya Kotake1, Sayaka Hirokawa1, Min Chul Shin2, Dong Keun Kim2, Tae Ho Kim2, Kyunghoon Kim2, Hisanori Aika
ISSCC 2025 Session 30 Memory
A 321-Layer 2Tb 4b/cell 3D-NAND-Flash Memory with a 75MB/s Program Throughput
Wanik Cho1, Chanhui Jeong1, Jongwoo Kim1, Jongseok Jung1, Keunseon Ahn1,
Jayoon Goo1, Sangkyu Lee1, Kayoung Cho1, Tei Cho1, Dauni Kim1, Gwan Park1, Yushin Ahn1, Sooyeol Chai1, Gwihan Ko1, Sunyoung Jung1, Eunwoo Jo1, Taehun Park1, Jinhyun Ban1, Cheoljoong Park1, Jae Hyun Park1, Sanghoon Oh1, S
ISSCC 2025 Session 30 Memory
A 16Gb 12.7Gb/s/pin LPDDR5-Ultra-Pro DRAM with 4-Phase Self-Calibration and AC-Coupled Transceiver Equalization in a 5th-Generation 10nm DRAM Process
Jin-Hyeok Baek, Jang-Hoo Kim, Yoo-Chang Sung, Jae-Woo Jeong,
Jin-Kwan Park, Hyun-Kyu Oh, Bo-Hyeon Lee, Dong-Wan Ko, Tae-Seob Oh, Seung-Gi Hong, Chang-Ki Kwon, Daihyun Lim, Myeong-O Kim, Seung-Jun Bae, Tae-Young Oh, Sang-Jun Hwang Samsung Electronics, Hwaseong, Korea The rapid grow
ISSCC 2025 Session 30 Memory
A 24Gb 42.5Gb/s GDDR7 DRAM with Low-Power WCK
Distribution, an RC-Optimized Dual-Emphasis TX, and, Voltage/Time-Margin-Enhanced Power Reduction
Sang-Hoon Kim, Jaehyeok Baek, Moon-Chul Choi, Daewoong Lee, Donggun An, Se mi Kim, Yeonggeun Song, Minkyo Shim, Sung-Yong Cho, Dongha Lee, Gunhee Cho, In-Woo Jun, Juseop Park, TaeYoon Lee, Hwan-Chul Jung, Chanyong Lee, G
ISSCC 2025 Session 30 Memory
A 1Tb 3b/cell 3D-Flash Memory with a 29%-Improved-EnergyEfficiency Read Operation and 4.8Gb/s Power-Isolated Low-Tapped-Termination I/Os
Kosuke Yanagidaira1, Mario Sako1, Yasuhiro Hirashima1, Junya Matsuno1,
Yumi Higashi1, Yutaka Shimizu1, Akihiro Imamoto1, Kazuaki Kawaguchi1, Koji Tabata1, Takeshi Nakano1, Yusuke Ochi1, Hiroaki Hoshino1, Takeshi Hioka1, Shigehito Saigusa1, Hiroki Date1, Masaki Unno1, Jumpei Sato1, You Kamat
ISSCC 2025 Session 30 Memory
A 28Gb/mm2 4XX-Layer 1Tb 3b/cell WF-Bonding 3D-NAND Flash with 5.6Gb/s/pin IOs
Sang-Soo Park, Jae-Doeg Lyu, Myungjun Kim, Jaeyun Lee, Younsun Song,
Chung-Ho Yu, Hirano Makoto, Yongseok Kwon, Jong-Hoon Park, Ho-Joon Kim, Daein Lee, Donghyun Seo, Byungrok Go, Seoyoon Jeon, Yoonjee Kim, Doo-Hyun Kim, Youngmin Jo, Hyunjun Yoon, Junehong Park, Inmo Kim, Sunghoon Kim, Hok
ISSCC 2025 Session 3 Analog Circuits
A CMOS Operational Amplifier Achieving ±5.8µV 3σ Offset and ±88nV/°C 3σ Offset Drift Using an On-Chip Heater-Based Self-Trimming Technique
In step three, the heater heats up M1,2 and the constant gm biasing circuit together to Thigh, resulting in an offset dr
important that the corresponding D0IDAC1vos code is used to ensure the opamp offset at Troom remains zero. Aodong Zhang1, Mingtao Zhan1, Mengying Chen2, Yi Zhong1, Lu Jie1, Nan Sun1, Qinwen Fan2 The trimming accuracy is