全部论文 — ISSCC — ISSCC 知识库

ISSCC 2025 Session 16 AI / ML

RNGD: A 5nm Tensor-Contraction Processor for Power-Efficient Inference on Large Language Models

Sang Min Lee1, Hanjoon Kim1, Jeseung Yeon1, Minho Kim1, Changjae Park1,

Byeongwook Bae1, Yojung Cha1, Wooyoung Choe1, Jonguk Choi1, Younggeun Choi1, Ki Jin Han2, Seokha Hwang1, Kiseok Jang1, Jaewoo Jeon1, Hyunmin Jeong1, Yeonsu Jung1, Hyewon Kim1, Sewon Kim1, Suhyung Kim1, Won Kim1, Yongseun

ISSCC 2025 Session 16 Digital Processors

Tomahawk5: 51.2Tb/s 5nm Monolithic Switch Chip for AI/ML Networking

Asad Khamisy1, Mohan Kalkunte1, Peter Del Vecchio1, Yokai Cheok1, Greg Barsky1,

(BCM78900 series, aka TH5) chip and the challenges of implementing a 51.2Tb/s advanced Ethernet switch in a monolithic die. We will describe several technologies that enabled TH5 realization and its advanced capabilities

Karlheinz Muth1, Reza Sharifi2 Broadcom, San Jose, CA Broadcom, Irvine

ISSCC 2025 Session 15 AI / ML

A 4.6µW 3.3-NEF Biopotential Amplifier with 133VPP Common-Mode Interference Tolerance and 102dB Total Common-Mode Rejection Ratio for Two-Electrode Recording System

Yongjae Park1, Yeong-Jin Mo2, Jeong-Hoon Kim3, Gert Cauwenberghs3, Seong-Jin Kim2

crucial in delivering vital information for medical diagnostics and research applications. Recently, the demand for biopotential recording using two electrodes has grown thanks to its better user experience and lower cos

Ulsan National Institute of Science and Technology, Ulsan, Korea Sogan

ISSCC 2025 Session 15 AI / ML

A 3.47 NEF 175.2dB FOMS Direct Digitization Front-End Featuring Delta Amplification for Enhanced Dynamic Range and Energy Efficiency in Bio-Signal Acquisition

Kyeongwon Jeong1, Can Livanelioglu1, Jiawei Liao1, Inhee Lee2, Taekwang Jang1

University of Pittsburgh, Pittsburgh, PA In addition, the first-stage amplifier bandwidth is set slightly below the Nyquist rate (100kHz), preventing aliasing of thermal noise and input interference. Therefore, the input

ETH Zürich, Zürich, Switzerland

ISSCC 2025 Session 15 AI / ML

Event-Based Spatially Zooming Neural Interface IC with 10nW/Input Reconfigurable-Inverter Fabric and Input-Adaptive Quantization

Jianxiong Xu1, Mustafa Kanchwala1, Mohammad Abdolrazzaghi1, Hanfeng Cai1,

Yu Huang1, Junyu Ma1, Chae Lim1, Lingyun Xu1, Shucheng Gong1, Weian Deng1, Qiaosong Deng1, Jin Che1, Sudip Nag1, Joshua Olorocisimo1, Rhianna Singh1, Yanze Wang1, Jose Sales Filho1, Mandana Mohaved2, Homeira Moradi2, Geo

ISSCC 2025 Session 15 AI / ML

A Neuroprosthetic SoC with Sensory Feedback Featuring Frequency-Splitting-Based Wireless Power Transfer with 200Mb/s 0.67pJ/b Backscatter Data Uplink and Unsupervised Multi-Class Spike Sorting

Yu Huang1, Bowen Liu1, Yuhan Hou1, Jianxiong Xu1, Hao You1, Ashley Hung1,

Swarnava Ghosh1, Eric Liu1, Naize Yang1, Junyu Ma1, Hanfeng Cai1, Laura Kondrataviciute1,2, Qiaosong Deng1, Suneil K. Kalia1,2, Andrew G. Richardson3, Ping-Hsuan Hsieh4, Roman Genov1, Xilin Liu1 University of Toronto, To

ISSCC 2025 Session 15 AI / ML

A 65nm Uncertainty-Quantifiable Ventricular Arrhythmia Detection Engine with 1.75µJ per Inference

Jianbo Liu, Zephan Enciso, Boyang Cheng, Likai Pei, Steven Davis, Yifan Qin,

for preventing Sudden Cardiac Death (SCD) by identifying life-threatening heart rhythms, such as ventricular tachycardia (VT) and ventricular fibrillation (VF) [1], and enabling timely intervention via implantable cardio

Zhenge Jia, Xiaobo Sharon Hu, Yiyu Shi, Ningyuan Cao University of Not

ISSCC 2025 Session 15 AI / ML

A 1024-Channel 0.00029mm2/ch 74nW/ch Online Spatial Spike-Sorting Chip with Event-Driven Spike Detection and Self-Organizing Map Clustering

Arash Akhoundi1, Yawende Landbrug1, Pumiao Yan2, E. J. Chichilnisky2,

Next-generation brain-computer interfaces will enable motor and speech decoding in humans [1-3] and improve our understanding of brain function [4]. To achieve this requires high-density multi-electrode arrays (HD-MEA) [

Boris Murmann3, Dante Gabriel Muratore1 Delft University of Technology

ISSCC 2025 Session 15 AI / ML

A 3.9mW 200words/min Neural Signal Processor in Speech Decoding for Brain-Machine Interface

Tun-Yu Chang, Jeng-Bang Wang, Yu-Hsuan Tsai, Chia-Hsiang Yang

Brain-machine interfaces (BMIs) are a promising technology that can be applied to AR/VR interfaces, neural prostheses, and machine control. Figure 15.1.1 shows BMI systems based on the source of decoded neural activities

National Taiwan University, Taipei, Taiwan

ISSCC 2025 Session 14 AI / ML

A 28nm 64kb Bit-Rotated Hybrid-CIM Macro with an Embedded Sign-Bit-Processing Array and a Multi-Bit-Fusion Dual-Granularity Cooperative Quantizer

Xi Chen, Shaochen Li, Zhican Zhang, Wentao Zheng, Xiao Tan, Yuchen Tang,

Yuhui Shi, Lizheng Ren, Yibo Mai, Feiran Liu, Jinwu Chen, Zhaoyang Zhang, An Guo, Tianzhu Xiong, Bo Wang, Xinning Liu, Weiwei Shan, Bo Liu, Hao Cai, Jun Yang, Xin Si Southeast University, Nanjing, China Hybrid-domain CIM

ISSCC 2025 Session 14 AI / ML

A 28nm 192.3TFLOPS/W Accurate/Approximate Dual-Mode-Transpose Digital 6T-SRAM CIM Macro for Floating-Point Edge Training and Inference connection using the 3rd-metal layer and connect the corresponding diagonal in the 4th layer; the row connection is in the 5th layer. This method circumvents the need for numerous MAC circuits and read ports as is the case for previous T-CIM works [7,8], resulting in a reduction in area and power consumption.

Yiyang Yuan1,2, Bingxin Zhang1,2, Yiming Yang3, Yishan Luo1,2, Qirui Chen3,

Shidong Lv3, Hao Wu1,2, Cailian Ma1,2, Ming Li1,2, Jinshan Yue1, Xinghua Wang3, Guozhong Xing1, Pui-In Mak4, Xiaoran Li3, Feng Zhang1 Figure 14.5.4 depicts the DCIM architecture supporting FP8, BF16, INT4, and INT8 forma

ISSCC 2025 Session 14 AI / ML

A 51.6TFLOPs/W Full-Datapath CIM Macro Approaching Sparsity Bound and <2-30 Loss for Compound AI

Zhiheng Yue*, Xujiang Xiang*, Yang Wang, Ruiqi Guo, Huiming Han,

with exceptional performance, but their prohibitive size and cost limits deployment on edge devices. The compound-AI combines several specialized small models to achieve matched or even superior accuracy on target downst

Shaojun Wei, Yang Hu, Shouyi Yin Tsinghua University, Beijing, China *

ISSCC 2025 Session 14 AI / ML

A 28nm 17.83-to-62.84TFLOPS/W Broadcast-Alignment Floating-Point CIM Macro with Non-Two’s-Complement MAC for CNNs and Transformers

Xing Wang*1,2, Tianhui Jiao*1, Yi Yang1, Shaochen Li1, Dongqi Li1, An Guo1,

Yuhui Shi1, Yuchen Tang1, Jinwu Chen1, Zhican Zhang1, Zhichao Liu1, Bo Liu1, Weiwei Shan1, Xin Wang3, Hao Cai1, Wenwu Zhu3, Jun Yang1,2, Xin Si1 Southeast University, Nanjing, China National Center of Technology Innovati

ISSCC 2025 Session 14 AI / ML

A 16nm 216kb, 188.4TOPS/W and 133.5TFLOPS/W Microscaling Multi-Mode Gain-Cell CIM Macro Edge-AI Devices loss of accuracy. In HV mode, the M2-IPU aligns INM based on both ∆PDE and ∆PDSS, with extra shifting in INM from ∆PDSS, which increases INM sparsity, further enhancing EEF. In phase 2 (Ph2), the OUT-PRO processes the activation function of the M2-CIM outputs and

generates INs for the next layer. In phase 3 (Ph3), the M2-IPU converts FP INs of the, subsequent layer to MX format. No

as the SS pre-processing circuit in Ph0, as the EXP processing circuit in Ph1, and as the FP2MX converter in Ph3. Win-San Khwa*1, Ping-Chun Wu*2, Jian-Wei Su2,3, Chiao-Yen Cheng2, Jun-Ming Hsu2, Yu-Chen Chen2, Le-Jung Hs

ISSCC 2025 Session 14 AI / ML

A 22nm 104.5TOPS/W µ-NMC-∆-IMC Heterogeneous STT-MRAM CIM Macro for Noise-Tolerant Bayesian Neural Networks

De-Qi You*1, Win-San Khwa*2, Bo Zhang3, Fang-Yi Chen1, Andrew Lee1,

Yu-Cheng Hung1, Yi-Ming Li1, Yu-Hui Wang1, Chung-Chuan Lo1, Ren-Shuo Liu1, Kea-Tiong Tang1, Chih-Cheng Hsieh1, Yu-Der Chih4, Tsung-Yung Jonathan Chang4, Meng-Fan Chang1,2 National Tsing Hua University, Hsinchu, Taiwan TS

ISSCC 2025 Session 13 Other

A Via-Programmable DNN-Processor Fabrication Toward 1/40th Mask Cost

Jaewon Shin, Rei Sumikawa, Dongzhu Li, Mototsugu Hamada, Atsutake Kosuge

Growing interest in healthcare has led to the development of many wearable battery-powered artificial-intelligence internet-of-things (AI-IoT) devices for continuous monitoring a wide variety of vital signs [1, 2] (Fig.

University of Tokyo, Tokyo, Japan

ISSCC 2025 Session 13 Other

An 18.5μW/qubit Cryo-CMOS Charge-Readout IC Demonstrating QAM Multiplexing for Spin Qubits

Quentin Schmidt1, Baptiste Jadot1, Brian Martinez1, Antoine Faurie1,

Tristan Meunier2, Jean-Baptiste Casanova3, Xavier Jehl4, Yvain Thonnart3, Franck Badets1 CEA-Léti, Grenoble, France Quobly, Grenoble, France 3 CEA-List, Grenoble, France 4 CEA-Pheliqs, Grenoble, France 1 2 Spin qubits ar

ISSCC 2025 Session 13 Other

Xiling: Cryo-CMOS 18-bit Dual-DAC Manipulator with 4.6μV Precision and 4.1nV/Hz0.5 Noise Co-Integrated with the Single Electron Transistor at 60mK

Yingjie Li1, Yifei Zhang2, Haichuan Lin3, Cheng Wang1

Southern University of Science and Technology, Shenzhen, China 3 Chengdu Data Automation System Technologies, Chengdu, China 1 2 Millions of physical quantum-bits (Qubits) are envisioned for a fault-tolerant quantum comp

University of Electronic Science and Technology of China, Chengdu, Chi

ISSCC 2025 Session 13 Other

A Cryo-BiCMOS Controller for 9Be+-Trapped-Ion-Based Quantum Computers

Peter Toth1, Paul E. Shine1, Sebastian Halama2, Yerzhan Kudabay1,

Kaoru Yamashita1,3, Hiroki Ishikuro3, Christian Ospelkaus2, Vadim Issakov1 Technische Universität Braunschweig, Braunschweig, Germany Leibniz University Hannover, Hannover, Germany 3 Keio University, Yokohama, Japan 1 2

ISSCC 2025 Session 13 AI / ML

An 8.62μW 75dB-DRSoC End-to-End Spoken-LanguageUnderstanding SoC with Channel-Level AGC and Temporal-Sparsity-Aware Streaming-Mode RNN

Sheng Zhou1, Zixiao Li1, Tobi Delbruck1, Kwantae Kim2, Shih-Chii Liu1

Aalto University, Espoo, Finland 1 Voice-controlled IoT nodes and wearable devices require integrated real-time ultra-lowpower audio classification circuits to perform tasks such as Keyword Spotting (KWS) and Spoken Lang

University of Zurich and ETH Zurich, Zurich, Switzerland

ISSCC 2025 Session 13 AI / ML

A 0.22mm2 161nW Noise-Robust Voice-Activity Detection Using Information-Aware Data Compression and Neuromorphic Spatial-Temporal Feature Extraction

Ying Liu*1, Jie Li*1, Qining Zhang*1, Tianhao Zhao2, Chenhao Shi1, Ninghui Shang1,

University, Hangzhou, China 3 Nano Core Chip Electronic Technology, Hangzhou, China 1 *Equally Credited Authors (ECAs) Nowadays, voice activation detection (VAD), typically consisting of the feature extractor (FE) and th

Peiyu Chen2, Xiaohuan Ge3, Yufei Ma1, Linxiao Shen1, Zhixuan Wang3, Ru

ISSCC 2025 Session 12 Other

Skin-Inspired Electronics: An Emerging Sensing and Computing Platform

Margherita Ronchini1,2, Weichen Wang1, Yuya Nishio1, Yating Yao1, Zhenan Bao1

Aarhus University, Aarhus, Denmark 1 2 Skin is the interface between our body and the environment. Its unique properties and sensing capabilities allow us to perceive the world around us. Information about shape, texture

Stanford University, Stanford, CA

ISSCC 2025 Session 12 Other

Reversing Scattering to Perform Deep-Tissue Optical Imaging and the Current Need for a Suitable Optoelectronic Solution Changhuei Yang

California Institute of Technology, Pasadena, CA, Biological tissues are highly turbid in the optical regime – the mean

is on the order of 100 microns. This extreme turbidity prevents scientists and clinicians from performing deeply penetrating high resolution optical imaging through humans and animal models alike. The challenge associate

ISSCC 2025 Session 12 Other

p-Circuits: Neither Digital nor Analog

Ming-Che Li1, Archisman Ghosh1, Risi Jaiswal1, Lakshmi Anirudh Ghantasala1,2,

circuits aim to solve important problems with ultra-high efficiency, making use of analog and digital circuits, with well-known trade-offs. This work is about a new paradigm which is neither analog nor digital, we call i

Behtash Behin-Aein2, Shreyas Sen1, Supriyo Datta1 Purdue University, W

ISSCC 2025 Session 12 Other

Circuits that Solve Optimization Problems by Exploiting Physics Inequalities

Eli Yablonovitch, Qixin Feng, Sri Vadlamani, Patrick Xiao

Optimization is vital to Engineering, Artificial Intelligence, and to many areas of Science. Mathematically, we usually employ steepest-descent, or other digital algorithms. For example, Deep Learning is an optimization

University of California, Berkeley, CA

ISSCC 2025 Session 11 Wireless

A 200MHz-BW Blocker-Tolerant Receiver with Fifth-Order Filtering Achieving 19dBm Adjacent-Channel IIP3

Liangbo Lei, Yanxiang Chen, Yijie Li, Zhiliang Hong, Yumei Huang

The fifth-generation (5G) New-Radio (NR) standard has been developed for high data-rate communication, with the RF channel bandwidth (BW) extending to several hundred megahertz. In this context, the presence of blockers

Fudan University, Shanghai, China

ISSCC 2025 Session 11 Wireless

A Gm-C RF Quadrature-Current-Generation Technique with 40dB IRR in 0.65V 2mW Multi-Mode CMOS GNSS Receiver

Chao Chen1, Wenchen Xiang2, Yan Zhao1, Xiaodong Su2, Jiuchun Chen2, Jun Yang1

Nanjing Low Power IC Technology Institute, Nanjing, China 1 2 For wearable devices such as GNSS bracelets and BLE headsets, the pursuit of lowering power consumption is an everlasting research topic [1-5]. Innovated topo

Southeast University, Nanjing, China

ISSCC 2025 Session 11 Wireless

A Compact Full-Duplex Receiver with Wideband Multi-Domain Hilbert-Transform-Equalization Cancellation Based on Multi-Stage APFs Achieving 65dB SIC Across 120MHz BW

Xingyu Ma, Wei Li, Shijiao Dong, Ruiyu Lyu, Fan Chen, Yunyou Pu,

efficiency, selfinterference-cancellation (SIC) techniques have received great attention to break through the main bottleneck caused by SI signals. The main issue of SIC techniques is how to broaden product of delay and

Chuangguo Wang , Hongtao Xu Fudan University, Shanghai, China Motivate

ISSCC 2025 Session 11 Wireless

A Blocker-Tolerant Receiver with VCO-Based Non-Uniform Multi-Level Time-Approximation Filter with -36dB EVM in 28nm CMOS

Ce Yang1,2, Shiyu Su1,3, Mostafa Ayesh1, Soumya Mahapatra1, Maysara Hamada1,

of Waterloo, Waterloo, Canada 1 2 The growing demand for wirelessly connected devices and networks has resulted in increasingly crowded spectrum, and hence blocker-tolerant receivers have drawn more attention. The undesi

Vinay Chenna1, Hossein Hashemi1, Mike Shuo-Wei Chen1 University of Sou

ISSCC 2025 Session 11 Wireless

A 256-Element Ka-Band CMOS Phased-Array Receiver Using Switch-Type Quadrature-Hybrid-First Architecture for Small Satellite Constellations element quadrature hybrid when the switches are turned off in quadrature-hybrid mode. On the other hand, in through mode, the midpoint of the two inductors can be connected to the grounds by turning the switches on. As a result, signals input to the IN H and IN V ports will flow to the OUT L/H and OUT R/V ports respectively after a 45-degree phase shift.

Sena Kato1, Jill Mayeda1, Keito Yuasa1, Michihiro Ide1, Takeshi Ota1, Shu Date1,

Yudai Yamazaki1, Xiaolin Wang1, Xi Fu1, Dongwon You1, Makoto Higaki2, Jumpei Sudo2, Hiroshi Takizawa2, Masashi Shirakura2, Takashi Tomura1, Hiroyuki Sakai1, Kazuaki Kunihiro1, Kenichi Okada1, Atsushi Shirane1 By placing

ISSCC 2025 Session 10 mm-Wave

A 28nm Multimode Multiband RF Transceiver with Harmonic-Rejection TX and Spur-Avoidance RX Supporting LTE Cat1bis

Fei Song1, Zexue Liu1,2, Danping Li3, Jiayi Ye1, Haopei Deng1, Yi Tan1,

Zherui Zhang1, Jingchen Tao1, Shenghao Sun3, Lei Wang3, Xu Wan3, Yuhang Jiang1, Haochen Zhu1, Jiayoon Ru1,2, Jinghua Zhang1, Jianhong Xiao1 XINYI Information Technology, Shanghai, China Peking University, Beijing, China

ISSCC 2025 Session 10 mm-Wave

A 2-TRX IR-UWB Transceiver with Shared Antennas Supporting Channels 5 to 12 in Compliance with IEEE 802.15.4/4z Standards

Hyun-Gi Seok, Jaekeun Lee, Sinyoung Kim, Wonjun Jung, Honggul Han,

Junhyeong Kim, Sumin Kang, Chanho Kim, Wonkang Kim, Jongpil Cho, Seungyoung Bae, Yanghoon Lee, Sungbeom Kim, Hyeonuk Son, Junyoung Jang, Taeyeon Kim, Sanguk Cho, Misuk Cho, Chiyoung Ahn, Hyukjun Sung, Wan Kim, Seunghyun

ISSCC 2025 Session 10 mm-Wave

A D-Band 2D-Scalable 4×4 Active Reflective Relay with Orthogonally Polarized On-Chip TX/RX Antennas and In-Front-End Common-Centroid Fast Azimuth/Elevation Angle-of-Arrival Detection

Basem Abdelaziz Abdelmagid, Boce Lin, Hua Wang

With the increasing demand for data rates, the mm-Wave and sub-THz spectrums have been actively explored for 6G wireless communication and sensing [1,2]. Although utilizing phased arrays with pencil-sharp beams overcomes

ETH Zürich, Zürich, Switzerland

ISSCC 2025 Session 10 mm-Wave

A 132-to-148GHz CMOS 4TX-4RX FMCW Radar Transceiver Array with Cavity-Backed Antenna-in-Package Achieving 28dBm EIRP

Bing Liu, Jiancheng Huang, Zhen Yang, Xuguang Li, Jin Zhang, Xu Wang,

Hao Shi, Fei Li, Zhenhua Xu, Ruipeng Liu, Shuangxu Li, Yongqiang Wang, Keping Wang, Haipeng Fu, Fanyi Meng, Kaixue Ma Tianjin University, Tianjin, China Due to the large available bandwidth, the D-band (110 to 170GHz) sp

ISSCC 2025 Session 10 mm-Wave

A 77GHz Hybrid TDMA-MIMO Phased-Array Radar with 186m Detection Range and 3cm Range Resolution

Zitong Zhang*, Yuri Lu*, Wentao Xu, Bo Cui, Chenge Hu, Zhiluo Zhang,

Sheng Sun, Zihao Ren, Cong Zhang, Ziyao Wang, Guangsheng Chen, Chunqi Shi, Leilei Huang, Long Xu, Runxi Zhang East China Normal University, Shanghai, China *Equally Credited Authors (ECAs) Millimeter-wave radar has been

ISSCC 2025 Session 1 Plenary

The Crucial Role of Semiconductors in the Software-Defined Vehicle Peter Schiefer

President & CEO, Automotive Division, Infineon Technologies, Munich, Germany

The world urgently needs new and smart forms of mobility. Pushed by the desire for eversmarter and ever-more connected cars, by the need to comply with ever-stricter emission standards, and by the calls for sustainable a

ISSCC 2025 Session 1 Plenary

AI Revolution Driven by Memory Technology Innovation Jaihyuk Song

Corporate President & CTO, Device Solutions

1.0 Introduction The memory industry is facing unprecedented challenges as it enters the AI era. The “memory wall” phenomenon, which impedes the speed of system improvements and the evolution of AI algorithms, is intensi

Samsung Electronics, Hwaseong, South Korea

ISSCC 2025 Session 1 Plenary

From Chips to Thoughts: Building Physical Intelligence into Robotic Systems Daniela Rus

Director, CSAIL & Andrew and Erna Viterbi Professor,

1. Introduction The rapid growth of AI technologies has brought unprecedented advancements across numerous domains, from healthcare to autonomous systems, yet this progress has been accompanied by substantial energy dema

Massachusetts Institute of Technology, Cambridge, MA

ISSCC 2025 Session 1 Plenary

AI Era Innovation Matrix Navid Shahriari

Senior Vice President, Foundry Technology Development, Intel, Chandler, AZ, AI holds transformative potential for humani

problems with speed and accuracy, and unlocking new realms of innovation and understanding. The lightning-fast progression of AI, unprecedented in history, necessitates rapid advancements at a system level, from low-powe