全部论文

Papers 2008–2026

共 3875 篇 ISSCC 论文，按年份倒序排列

年份 Year
2026 2472025 2422024 2222023 2002022 1672021 1952020 2022019 1812018 2052017 2082016 2002015 1912014 2032013 2102012 1882011 1962010 2102009 1802008 228
领域 Topic
RF & Wireless 362Power Management 302Wireline I/O 300Wireless 293Data Converters 279Digital Processors 268Memory 266AI / ML 231Digital Circuits 220Medical & Bio 211Image Sensors 184Analog Circuits 169mm-Wave 138Clocking & PLLs 127Sensors 100Plenary 63Hardware Security 36Quantum & Photonics 29Industry Highlights 7
顶级机构
University of California 101Delft University of Technology 73University of Macau 58KAIST 51Massachusetts Institute of Tec 48Tsinghua University 39National Taiwan University 38University of Michigan 37Georgia Institute of Technolog 35Columbia University 28Hong Kong University of Scienc 24MediaTek 23
ISSCC 2017 Session 24 Wireless
A 673μW 1.8-to-2.5GHz Dividerless Fractional-N Digital PLL with an Inherent Frequency-Capture Capability and a Phase-Dithering Spur Mitigation for IoT Applications
Yuming He1, Yao-Hong Liu1, Takashi Kuramochi2, Johan van den Heuvel1,
Belgium 1 2 The Internet-of-Things (IoT) is gaining momentum, and the ultra-low-power (ULP) RF transceiver is one of the key enablers. Generation of the local oscillator (LO) consumes a significant share of the total ene
Benjamin Busze1, Nereo Markulic3, Christian Bachmann1, Kathleen Philip
ISSCC 2017 Session 24 Wireless
A Time-Interleaved Filtering-by-Aliasing Receiver Front-End with >70dB Suppression at <4×Bandwidth Frequency Offset
Sameed Hameed, Sudhakar Pamarti
Programmable receiver front-ends have been a topic of enormous interest in recent years. Both N-path filtering [1,2] and charge-domain filtering [2] achieve sharp filtering but suffer from poor matching [1] or high noise
University of California, Los Angeles, CA
ISSCC 2017 Session 24 Wireless
A 4.5nW Wake-Up Radio with -69dBm Sensitivity
Haowei Jiang, Po-Han Peter Wang, Li Gao, Pinar Sen, Young-Han Kim,
Gabriel M. Rebeiz, Drew A. Hall, Patrick P. Mercier University of California, San Diego, CA Wake-up receivers (WuRXs) are low-power radios that continuously monitor the RF environment to wake up a higher-power radio upon
ISSCC 2017 Session 24 Wireless
A 0.18V 382μW Bluetooth Low-Energy (BLE) Receiver with 1.33nW Sleep Power for Energy-Harvesting Applications in 28nm CMOS
Wei-Han Yu1, Haidong Yi1, Pui-In Mak1, Jun Yin1, Rui P. Martins1,2
Instituto Superior Tecnico, Universidade de Lisboa, Portugal 1 2 For true mobility, wearable electronics should be self-powered by the environment. On-body thermoelectric (~50μW/cm2) is a maturing energy source but deliv
University of Macau, Macau, China
ISSCC 2017 Session 24 Wireless
A High-Linearity CMOS Receiver Achieving +44dBm IIP3 and +13dBm B1dB for SAW-Less LTE Radio
Yuanching Lien1,2, Eric Klumperink1, Bernard Tenbroek3, Jon Strange3, Bram Nauta1
high-linearity up-front filtering to prevent corruption of the in-band signals by strong out-of-band (OOB) signals and selfinterference from the transmitter. SAW duplexer filters are generally used for this purpose, but
University of Twente, Enschede, The Netherlands MediaTek, Hsinchu, Tai
ISSCC 2017 Session 24 Wireless
A 0.1-to-3.1GHz 4-Element MIMO Receiver Array Supporting Analog/RF Arbitrary Spatial Filtering
Linxiao Zhang, Harish Krishnaswamy
Digital receiver (RX) arrays featuring ADCs at each element enable massive multiin-multi-out (MIMO) applications, but since spatial interference rejection is absent in the RF/analog domain, RF/analog/ADC dynamic range is
Columbia University, New York, NY
ISSCC 2017 Session 24 Wireless
A 770pJ/b 0.85V 0.3mm2 DCO-Based Phase-Tracking RX Featuring Direct Demodulation and Data-Aided Carrier Tracking for IoT Applications
Yao-Hong Liu1, Vijaya Kumar Purushothaman1,2, Chuang Lu1,
Johan Dijkhuis1, Robert Bogdan Staszewski2,3, Christian Bachmann1, Kathleen Philips1 Holst Centre / imec, Eindhoven, The Netherlands 2 Delft University of Technology, Delft, The Netherlands 3 University College Dublin, D
ISSCC 2017 Session 23 Memory
An 8-Channel 4.5Gb 180GB/s 18ns-Row-Latency RAM for the Last Level Cache
Tah-Kang Joseph Ting1, Gyh-Bin Wang1, Ming-Hung Wang1,
Chun-Peng Wu1, Chun-Kai Wang1, Chun-Wei Lo1, Li-Chin Tien1, Der-Min Yuan1, Yung-Ching Hsieh1, Jenn-Shiang Lai2, Wen-Pin Hsu2, Chien-Chih Huang2, Chi-Kang Chen2, Yung-Fa Chou2, Ding-Ming Kwai2, Zhe Wang3, Wei Wu3, Shigeki
ISSCC 2017 Session 23 Memory
A 1V 7.8mW 15.6Gb/s C-PHY Transceiver Using Tri-Level Signaling for Post-LPDDR4
Woojun Choi1, Taewoong Kim1, Jongjoo Shim2, Hyungsoo Kim2,
smartphones and tablet PCs [1, 2]. Since mobile DRAM standard (LPDDR), for the next generation, targets the speed specification of 51.2GB/s, its I/O interface demands high bandwidth, low power and high efficiency. Single
Gunhee Han1, Youngcheol Chae1 Yonsei University, Seoul, Korea SK hynix
ISSCC 2017 Session 23 Memory
A Time-Based Receiver with 2-tap DFE for a 12Gb/s/pin Single-Ended Transceiver of Mobile DRAM Interface in 0.8V 65nm CMOS
Il-Min Yi1, Min-Kyun Chae1, Seok-Hun Hyun2, Seung-Jun Bae2,
Single-ended transceivers are mostly used for DRAM interfaces to reduce pin count. A low-supply transceiver is preferred, especially for mobile DRAM interfaces, for low-power consumption while maintaining a high-speed in
Jung-Hwan Choi2, Seong-Jin Jang2, Byungsub Kim1, Jae-Yoon Sim1, Hong-J
ISSCC 2017 Session 23 Memory
A 0.6V 4.266Gb/s/pin LPDDR4X Interface with AutoDQS Cleaning and Write-VWM Training for Memory Controller
Soo-Min Lee, Jihun Oh, Jinho Choi, Seokkyun Ko, Daero Kim,
Kyounghoi Koo, Jongryun Choi, Yoonjee Nam, Sangsoo Park, Hyungkweon Lee, Eunsu Kim, Sukhyun Jung, Kwanyeob Chae, Suho Kim, Sanghune Park, Sanghyun Lee, Sungho Park Samsung Electronics, Hwasung, Korea Although the LPDDR4
ISSCC 2017 Session 23 Memory
A 4Gb LPDDR2 STT-MRAM with Compact 9F2 1T1MTJ Cell and Hierarchical Bitline Architecture
Kwangmyoung Rho1, Kenji Tsuchida2, Dongkeun Kim1, Yutaka Shirai2,
Jihyae Bae1, Tsuneo Inaba2, Hiromi Noro2, Hyunin Moon1, Sungwoong Chung1, Kazumasa Sunouchi2, Jinwon Park1, Kiseon Park1, Akihito Yamamoto2, Seoungju Chung1, Hyeongon Kim1, Hisato Oyamatsu2, Jonghoon Oh1 SK hynix Semicon
ISSCC 2017 Session 23 Memory
An Extremely Low-Standby-Power 3.733Gb/s/pin 2Gb LPDDR4 SDRAM for Wearable Devices
Hye-Jung Kwon, Eunsung Seo, Chan-Yong Lee, Young-Hun Seo,
Gong-Heum Han, Hye-Ran Kim, Jong-Ho Lee, Min-Su Jang, Sung-Geun Do, Seung-Hyun Cho, Jae-Koo Park, Su-Yeon Doo, Jung-Bum Shin, Sang-Hoon Jung, Hyoung-Ju Kim, In-Ho Im, Beob-Rae Cho, Jae-Woong Lee, Jae-Youl Lee, Ki-Hun Yu,
ISSCC 2017 Session 23 Memory
A 4.8Gb/s/pin 2Gb LPDDR4 SDRAM with Sub-100μA Self-Refresh Current for IoT Applications
Nohhyup Kwak, Saeng-Hwan Kim, Kyong Ha Lee, Chang-Ki Baek,
Mun Seon Jang, Yongsuk Joo, Seung-Hun Lee, Woo Young Lee, Eunryeong Lee, Donghee Han, Jaeyeol Kang, Jung Ho Lim, Jae-Beom Park, Kyung-Tae Kim, Sunki Cho, Sung Woo Han, Jee Yeon Keh, Jun Hyun Chun, Jonghoon Oh, Seok Hee L
ISSCC 2017 Session 23 Memory
A 5Gb/s/pin 8Gb LPDDR4X SDRAM with PowerIsolated LVSTL and Split-Die Architecture with 2-Die ZQ Calibration Scheme
Chang-Kyo Lee, Yoon-Joo Eom, Jin-Hee Park, Junha Lee, Hye-Ran Kim,
Kihan Kim, Young Choi, Ho-Jun Chang, Jonghyuk Kim, Jong-Min Bang, Seungjun Shin, Hanna Park, Sujin Park, Young-Ryeol Choi, Hoon Lee, Kyong-Ho Jeon, Jae-Young Lee, Hyo-Joo Ahn, Kyoung-Ho Kim, Jung-Sik Kim, Soobong Chang,
ISSCC 2017 Session 23 Memory
An 8Gb 12Gb/s/pin GDDR5X DRAM for Cost-Effective High-Performance Applications
Martin Brox1, Mani Balakrishnan1, Martin Broschwitz1,
Cristian Chetreanu1, Stefan Dietrich1, Fabien Funfrock1, Marcos Alvarez Gonzalez1, Thomas Hein1, Eugen Huber1, Daniel Lauber1, Milena Ivanov1, Maksim Kuzmenka1, Chris Mohr2, Francisco Emiliano Munoz1, Juan Ocon Garrido1,
ISSCC 2017 Session 22 Wireless
An AC-Input Inductorless LED Driver for Visible-LightCommunication Applications with 8Mb/s Data-Rate and 6.4% Low-Frequency Flicker
Yuan Gao, Lisong Li, Philip K. T. Mok
Light-emitting diodes (LEDs) are becoming the dominant lighting source over their conventional counterparts. Besides the benefits of high efficiency and long lifetime, LEDs also show great potential for high-speed data t
Hong Kong University of Science and Technology, Hong Kong, China
ISSCC 2017 Session 22 Wireless
An Inductively-Coupled Wireless Power-Transfer System that is Immune to Distance and Load Variations
Jiacheng Pan, Asad A. Abidi, Dejan Rozgić, Hariprasad Chandrakumar, Dejan Marković
University of California, Los Angeles, CA Biomedical implants are often powered by an external source via an inductivelycoupled wireless power link. During actual use the distance between the external and implant coils m
ISSCC 2017 Session 22 Wireless
A Fully Integrated Counter-Flow Energy Reservoir for 70%-Efficient Peak-Power Delivery in Ultra-LowPower Systems
Xiao Wu, Kyojin Choo, Yao Shi, Li-Xuan Chuo, Dennis Sylvester, David Blaauw
University of Michigan, Ann Arbor, MI Recent advances in circuits have enabled significant reduction in the size of wireless systems such as implantable biomedical devices. As a consequence, the battery integrated in the
ISSCC 2017 Session 22 Wireless
A 93%-Power-Efficiency Photovoltaic Energy Harvester with Irradiance-Aware Auto-Reconfigurable MPPT Scheme Achieving >95% MPPT Efficiency Across 650μW to 1W and 2.9ms FOCV MPPT Transient Time
Sandip Uprety, Hoi Lee
With more and more functions in modern battery-powered mobile devices, enabling light-harvesting in the power management system can extend battery usage time [1]. For both indoor and outdoor operations of mobile devices,
University of Texas at Dallas, Richardson, TX
ISSCC 2017 Session 22 Wireless
A Reconfigurable Bidirectional Wireless Power Transceiver with Maximum-Current Charging Mode and 58.6% Battery-to-Battery Efficiency
Mo Huang1,a, Yan Lu1, Seng-Pan U1,2, Rui P. Martins1,3
Synopsys Macau, Macau, China 3 Instituto Superior Tecnico, Universidade de Lisboa, Portugal 1 2 a And the MUX7 needs to conduct the same current as MP and MN, which will double the area and conduction loss. 2) Under the
University of Macau, Macau, China
ISSCC 2017 Session 22 Wireless
Adaptive Reconfigurable Voltage/Current-Mode Power Management with Self-Regulation for ExtendedRange Inductive Power Transmission
Hesam Sadeghi Gougheri, Mehdi Kiani
Wireless power transmission (WPT) via inductive coupling is used in many applications such as biomedical implants, sensors, and radio-frequency identification (RFID). Range extension, robustness against load (RL) variati
Pennsylvania State University, University Park, PA
ISSCC 2017 Session 22 Wireless
A 1.7mm2 Inductorless Fully Integrated FlippingCapacitor Rectifier (FCR) for Piezoelectric Energy Harvesting with 483% Power-Extraction Enhancement
Zhiyuan Chen1, Man-Kay Law1, Pui-In Mak1, Wing-Hung Ki2,
Rui P. Martins1,3 University of Macau, Macau, China Hong Kong University of Science and Technology, Hong Kong, China 3 Instituto Superior Tecnico, Universidade de Lisboa, Portugal 1 2 Energy Harvesting is crucial to the
ISSCC 2017 Session 22 Wireless
A Self-Tuning Resonant Inductive Link Transmit Driver Using Quadrature-Symmetric Phase-Switched Fractional Capacitance
Henry Kennedy, Rares Bodnar, Teerasak Lee, William Redman-White
University of Southampton, Southampton, United Kingdom Inductive coupling for power transfer is increasingly popular in many applications such as RFID and wireless charging. While much recent work has focussed on receive
ISSCC 2017 Session 21 Digital Processors
An Actively Detuned Wireless Power Receiver with Public Key Cryptographic Authentication and Dynamic Power Allocation
Nachiket V. Desai1, Chiraag Juvekar1, Shubham Chandak2, Anantha P. Chandrakasan1
they replace Point-Doubling with an essentially free Frobenius Endomorphism [7]. Efficient micro-coding and a Serial Input Parallel Output (SIPO) finite field multiplier ensure that only 2 additional registers (t, z) are
Massachusetts Institute of Technology, Cambridge, MA Stanford Universi
ISSCC 2017 Session 21 Digital Processors
2pJ/MAC 14b 8×8 Linear Transform Mixed-Signal Spatial Filter in 65nm CMOS with 84dB Interference Suppression
Siddharth Joshi1, Chul Kim1, Sohmyung Ha2, Yu Mike Chi3, Gert Cauwenberghs1
machine learning (ML) and the internet-of-things (IoT) have resulted in a renewed interest in analog matrix-vector multiplication (MvM) accelerators [1-3]. Classification based tasks have exploited low-to-medium resoluti
University of California, San Diego, CA New York University, Abu Dhabi
ISSCC 2017 Session 21 Digital Processors
A 12nW Always-On Acoustic Sensing and Object Recognition Microsystem Using Frequency-Domain Feature Extraction and SVM Classification
Seokhyeon Jeong1, Yu Chen1,2, Taekwang Jang1, Julius Tsai3,
increasingly intelligent and context-aware. Sound is an attractive sensory modality because it is information-rich but not as computationally demanding as alternatives such as vision. New applications of ultra-low power
David Blaauw1, Hun-Seok Kim1, Dennis Sylvester1 University of Michigan
ISSCC 2017 Session 21 Digital Processors
A 3-to-5V Input 100Vpp Output 57.7mW 0.42% THD+N Highly Integrated Piezoelectric Actuator Driver
Simon Chaput, David Brooks, Gu-Yeon Wei
Piezoelectric actuators are used in a growing range of applications, e.g., haptic feedback systems, cooling fans, and microrobots. However, to fully realize their potential, these actuators require drivers able to effici
Harvard University, Cambridge, MA
ISSCC 2017 Session 21 Digital Processors
A Reduced-Order Sliding-Mode Controller with an Auxiliary PLL Frequency Discriminator for Ultrasonic Electric Scalpels
Xiaosen Liu1,2, Adrian I. Colli-Menchi1, Edgar Sanchez-Sinencio1
Intel, Hillsboro, OR 1 2 Piezoelectric transducer (PT) is an emerging energy-based technology for electrosurgery. With proper driving signals, the PT is utilized as an electric scalpel as shown in Fig. 21.4.1. It convert
Texas A&M University, College Station, TX
ISSCC 2017 Session 21 Digital Processors
A Sub-mm3 Wireless Implantable Intraocular Pressure Monitor Microsystem
Hansraj Bhamra, Jui-Wei Tsai, Yu-Wen Huang, Quan Yuan, Pedro Irazoqui
intraocular pressure (IOP) in the anterior chamber of the eye can damage the optic nerve causing irreversible blindness [1]. An IOP monitoring microsystem (IMM) implanted in the interior chamber of the eye is required to
Purdue University, West Lafayette, IN Glaucoma is an eye disease, wher
ISSCC 2017 Session 21 Digital Processors
A 1.4mΩ-Sensitivity 94dB-Dynamic-Range Electrical Impedance Tomography SoC and 48-Channel Hub SoC for 3D Lung Ventilation Monitoring System
Minseo Kim, Hyunki Kim, Jaeeun Jang, Jihee Lee, Jaehyuk Lee,
ventilation because it is the only real-time lung imaging method without large equipment [1-2]. However, previous EIT systems just provided 2D cross-sectional image with limited spatial information of the lung and unnegl
Jiwon Lee, Kyungrog Lee, Kwantae Kim, Yongsu Lee, Hoi-jun Yoo KAIST, D
ISSCC 2017 Session 21 Digital Processors
Nanowatt Circuit Interface to Whole-Cell Bacterial Sensors
Phillip Nadeau1, Mark Mimee1, Sean Carim2, Timothy K. Lu1, Anantha P. Chandrakasan1
emerging as a platform for small molecule detection in challenging environments [1]. A key barrier to widespread deployment of autonomous bacterial sensors is the detection of low-level bioluminescence, which is typicall
Massachusetts Institute of Technology, Cambridge, MA University of Cal
ISSCC 2017 Session 20 Digital Circuits
A 13.8µW Binaural Dual-Microphone Digital ANSI S1.11 Filter Bank for Hearing Aids with Zero-ShortCircuit-Current Logic in 65nm CMOS
Hsi-Shou Wu, Zhengya Zhang, Marios C. Papaefthymiou
This paper presents an ANSI S1.11 1/3-octave filter-bank chip for binaural hearing aids with two microphones per ear. Binaural multimicrophone systems significantly suppress noise interference and preserve interaural tim
University of Michigan, Ann Arbor, MI
ISSCC 2017 Session 20 Digital Circuits
A 0.5V-VIN 1.44mA-Class Event-Driven Digital LDO with a Fully Integrated 100pF Output Capacitor
Doyun Kim1, Jonghwan Kim2, Hyunju Ham2, Mingoo Seok1
SK hynix, Icheon, Korea 1 2 In today’s system-on-chip designs, a low-drop-out voltage regulator (LDO) is one of the most popular choices to create a distinct voltage domain owing to its high power density. Many LDOs, how
Columbia University, New York, NY
ISSCC 2017 Session 20 Digital Circuits
A Dual-Symmetrical-Output Switched-Capacitor Converter with Dynamic Power Cells and Minimized Cross Regulation for Application Processors in 28nm CMOS of the regulation loop is much faster than that of power-cell allocation, stability is ensured. Each power cell consists of 2 flying capacitors and 8 power transistors and the VCR can be 2/3× or 1/2×. The configuration of each power cell is optimized to minimize the parasitic loss [6]. The channel selection switches, controlled by sel[n], connect the local output VOL to VO1 or VO2.
Junmin Jiang1,2, Yan Lu1, Wing-Hung Ki2, Seng-Pan U1,3, Rui P. Martins1,4, Figure 20.5.3 shows the control logic that co
and the power-cell shift register. First, the one-shot signals (ck1os and ck2os) control P1 and P2 to charge CC1 and CC2 for one clock period only. The ready signals (ready1 and ready2) are activated after charging is fi
ISSCC 2017 Session 20 Digital Circuits
An Output-Capacitor-Free Analog-Assisted Digital Low-Dropout Regulator with Tri-Loop Control
Mo Huang1,2, Yan Lu1, Seng-Pan U1,3, Rui P. Martins1,4
now with South China University of Technology, Guangzhou, China 2 Synopsys Macau Ltd, Macao, China Instituto Superior Tecnico, Universidade de Lisboa, Portugal 3 4 Low-dropout regulators (LDOs) are widely distributed in
University of Macau, Macau, China
ISSCC 2017 Session 20 Digital Circuits
A 100nA-to-2mA Successive-Approximation Digital LDO with PD Compensation and Sub-LSB Duty Control Achieving a 15.1ns Response Time at 0.5V
Loai G. Salem, Julian Warchall, Patrick P. Mercier
Modern subthreshold SoC designs feature multiple power domains to dynamically track the maximum energy-efficiency point (0.32-0.45V [1]) in response to application demands. While analog low-drop-out (LDO) regulators have
University of California, San Diego, CA
ISSCC 2017 Session 20 Digital Circuits
Digital Low-Dropout Regulator with Anti PVT-Variation Technique for Dynamic Voltage Scaling and Adaptive Voltage Scaling Multicore Processor
Wen-Jie Tsou1, Wen-Hau Yang1, Jian-He Lin1, Hsin Chen1,
processors have been widely used in battery-operated portable systems, desktop, and server applications, where dynamic voltage scaling (DVS) and adaptive voltage scaling (AVS) techniques are commonly employed to lower po
Ke-Horng Chen1, Chin-Long Wey1, Ying-Hsi Lin2, Shian-Ru Lin2, Tsung-Ye
ISSCC 2017 Session 20 Digital Circuits
A Digitally Controlled Fully Integrated Voltage Regulator with On-Die Solenoid Inductor with Planar Magnetic Core in 14nm Tri-Gate CMOS
Harish Kumar Krishnamurthy, Vaibhav Vaidya, Sheldon Weng,
efficient and widerange local power delivery and management capability with fast transient response for fine-grain DVFS domains of high power density in complex SoCs. Integration of high-quality power inductors that can
Krishnan Ravichandran, Pavan Kumar, Stephen Kim, Rinkle Jain, George M
ISSCC 2017 Session 2 Power Management
A Class-G Voltage-Mode Doherty Power Amplifier
Voravit Vorapipat, Cooper Levy, Peter Asbeck
In modern communication, wideband and high-spectral-efficiency modulation results in high peak-to-average power ratio (PAPR), up to 8 to 10dB. Well-known PA-efficiency-enhancement techniques, such as Doherty and outphasi
University of California, San Diego, CA
ISSCC 2017 Session 2 Power Management
A Wideband 28GHz Power Amplifier Supporting 8×100MHz Carrier Aggregation for 5G in 40nm CMOS
Sherif Shakib1, Mohamed Elkholy1, Jeremy Dunworth2, Vladimir Aparin2, Kamran Entesari1
racing to deploy fifth generation (5G) mm-wave technology, e.g., rollout of some 28GHz-band services is intended in 2017 in the USA with ~5/1Gb/s downlink/uplink targets. Even with 64-QAM signaling, this translates to an
Texas A&M University, College Station TX Qualcomm, San Diego, CA 1 2 T
ISSCC 2017 Session 2 Power Management
A SiGe BiCMOS E-Band Power Amplifier with 22% PAE at 18dBm OP1dB and 8.5% at 6dB Back-Off Leveraging Current Clamping in a Common-Base Stage
Junlei Zhao1,2, Elham Rahimi1, Francesco Svelto1, Andrea Mazzanti1
now with HiSilicon-Technologies, Milan, Italy 2 Several spectrum portions at mm-waves are considered for Gb/s data-rates in 5G cellular wireless backhaul and access networks, further motivating innovation in circuits and
University of Pavia, Pavia, Italy
ISSCC 2017 Session 2 Power Management
A High-Efficiency Multiband Class-F Power Amplifier in 0.153μm Bulk CMOS for WCDMA/LTE Applications
Jenwei Ko, Xiaochuan Guo, Changhua Cao, Saravanan Rajapandian,
Solti Peng, Jing Li, Wenchang Lee, Narayanan Baskaran, Caiyi Wang Although the Class-F operation and the HVMOS improve reliability significantly, real-time voltage-stress monitoring (VSM) is implemented on each of the ou
ISSCC 2017 Session 2 Power Management
A 2.4V 23.9dBm 35.7%-PAE -32.1dBc-ACLR LTE20MHz Envelope-Shaping-and-Tracking System with a Multiloop-Controlled AC-Coupling Supply Modulator and a Mode-Switching PA
Xun Liu, Heng Zhang, Min Zhao, Xuan Chen, Philip K. T. Mok, Howard C. Luong
the efficiency of the power amplifiers (PAs) due to high peak-to-average power ratios of transmitted signals. Envelope tracking (ET) and envelope-eliminationand-restoration (EER) techniques have been proposed to improve
Hong Kong University of Science and Technology, Hong Kong, China Long-
ISSCC 2017 Session 2 Power Management
A Single-Inductor Dual-Output Converter with LinearAmplifier-Driven Cross Regulation for Prioritized Energy-Distribution Control of Envelope-Tracking Supply Modulator
Shang-Hsien Yang1, Yen-Ting Lin1, Yu-Sheng Ma1, Hung-Wei Chen1,
mobile devices handle modulated signals with high peak-toaverage power ratios (PAPRs) while maintaining linearity and power efficiency. Envelope-tracking technology increases the efficiency of an RF-PA by modulating its
Ke-Horng Chen1, Chin-Long Wey1, Ying-Hsi Lin2, Shian-Ru Lin2, Tsung-Ye
ISSCC 2017 Session 2 Power Management
A Fully Integrated Reconfigurable Wideband Envelope-Tracking SoC for High-Bandwidth WLAN Applications in a 28nm CMOS Technology
Debopriyo Chowdhury, Sraavan R. Mundlapudi, Ali Afsahi
Envelope tracking (ET) has become popular for enhancing battery life in mobile communication devices that employ high peak-to-average power ratio (PAPR) signals. Most of the published ET systems have focused either on na
Broadcom, San Diego, CA
ISSCC 2017 Session 2 Power Management
A 28GHz/37GHz/39GHz Multiband Linear Doherty Power Amplifier for 5G Massive MIMO Applications
Song Hu, Fei Wang, Hua Wang
Millimeter-wave fifth-generation (5G) systems will extensively leverage massive multiple-input multiple-output (MIMO) architectures to improve their link performance. These array systems will employ many power amplifiers
Georgia Institute of Technology, Atlanta, GA
ISSCC 2017 Session 19 Clocking & PLLs
A 0.2V Trifilar-Coil DCO with DC-DC Converter in
16nm FinFET CMOS with 188dB FOM, 1.3kHz
Resolution, and Frequency Pushing of 38MHz/V for Energy Harvesting Applications QTrifialr=Im(ZTotal)/Re(ZTotal). The total QTrifilar is a combination of Q-factors of the three coils. Two thick metals and one ultra-thick
ISSCC 2017 Session 19 Clocking & PLLs
A 2.4GHz RF Fractional-N Synthesizer with 0.25fREF BW
Long Kong, Behzad Razavi
The loop bandwidth of conventional RF fractional-N synthesizers has been limited to about fREF/10 despite the use of methods that suppress the ΔΣ-modulator quantization noise [1-4]. The trade-off between the loop bandwid
University of California, Los Angeles, CA
ISSCC 2017 Session 19 Clocking & PLLs
A 0.0049mm2 2.3GHz Sub-Sampling Ring-Oscillator PLL with Time-Based Loop Filter Achieving -236.2dB Jitter-FOM
Jeffrey (Tsung-Hao) Chuang, Harish Krishnaswamy
High-performance phase-locked loops (PLLs) and clock multipliers with low jitter/phase noise are essential for numerous applications, such as digital microprocessors and SoCs, wireline/optical links, data converters and
Columbia University, New York, NY